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records? arrays? generate?

THOMAS L DRABENSTO

2

338

Fri, 13 Dec 1996 20:38:13 GMT

Stuart Sutherla

ANNOUNCE: Verilog Archives Available Via WWW

Steve Philli

0

340

Fri, 13 Dec 1996 19:07:14 GMT

Steve Philli

Parsing Verilog

Brian McMi

3

329

Wed, 11 Dec 1996 13:31:27 GMT

Steven Greenbe

Verilog for complex PLD's

Ken Goldm

0

347

Wed, 11 Dec 1996 04:59:30 GMT

Ken Goldm

Model of USARTs wanted.

Jae C

0

350

Tue, 10 Dec 1996 08:31:20 GMT

Jae C

VIUF CALL FOR PAPERS AND TUTORIALS

Carl E He

0

354

Mon, 09 Dec 1996 06:04:34 GMT

Carl E He

What graphical state machine tools are people using?

Peter Bi

3

357

Mon, 09 Dec 1996 01:49:20 GMT

Carl Wuebk

Custom Resolution Function in Verilog/PLI

Jim J. Li

5

357

Sun, 08 Dec 1996 06:36:37 GMT

Clifford E. Cummin

Reading input files

MICHELE ANN SED

3

358

Sat, 07 Dec 1996 03:27:29 GMT

Michael T.Y. McNama

newbie question: inout bus query.

Padraig OMaho

1

360

Sat, 07 Dec 1996 01:37:35 GMT

Ken Ro

Position Available

Steve Muni

0

362

Wed, 04 Dec 1996 10:09:37 GMT

Steve Muni

Have you used LSI's Megafunctions ?

Phil Jaco

2

356

Wed, 04 Dec 1996 00:16:18 GMT

Anders Nordstr

clock generation

Malcolm Walla

0

366

Wed, 04 Dec 1996 00:05:02 GMT

Malcolm Walla

DAC '94 & The Greatful Dead

John Cool

0

368

Tue, 03 Dec 1996 23:43:43 GMT

John Cool

Employment Opportunity - ASIC/Simulation Engineer

Verilog Opportunities at Comp

0

367

Tue, 03 Dec 1996 18:04:00 GMT

Verilog Opportunities at Comp

OPENINGS FOR SOFTWARE ENGINEERS

Daniel Chapi

0

371

Tue, 03 Dec 1996 12:21:32 GMT

Daniel Chapi

Path delays.

Sridhar Adi

2

375

Sun, 01 Dec 1996 23:43:23 GMT

Michael T.Y. McNama

Any way to "initialize" a wire in verilog?

Hank H. L

5

373

Sun, 01 Dec 1996 07:06:31 GMT

Robert Brashea

FAQ: Comp.lang.verilog Frequently Asked Questions (with answers)

Steve Philli

0

376

Sat, 30 Nov 1996 22:03:34 GMT

Steve Philli

Extended State Diagrams Tool on PC

doron yores

1

379

Fri, 29 Nov 1996 04:13:33 GMT

David W. Stringfell

Perculiar question (what is negedge of a bus?)

Jan Otterste

1

383

Tue, 26 Nov 1996 23:34:06 GMT

Interpretive Syste

Verilog spec??

Erh-Chiao Charles Wang V

1

382

Tue, 26 Nov 1996 15:43:38 GMT

Steven Greenbe

Job Opening at Megatest Corp.

Chandresh Patel caes..

0

385

Tue, 26 Nov 1996 14:31:31 GMT

Chandresh Patel caes..

Verilog DRAM models -- sources?

Kuko

0

387

Tue, 26 Nov 1996 10:22:01 GMT

Kuko

Can anyone helpme?

Ferrer Prieto Jorge /ECP/E

2

387

Sun, 24 Nov 1996 23:29:38 GMT

Steven Greenbe

hilo2verilog

Wolfgang Meyer I5.E

0

392

Sun, 24 Nov 1996 14:51:47 GMT

Wolfgang Meyer I5.E

Verilog Books

Balraj Singh - 51

0

394

Sun, 24 Nov 1996 04:40:14 GMT

Balraj Singh - 51

??? Profiler for VCS/verilog ???

Aiman Kabaki

1

394

Sat, 23 Nov 1996 02:42:57 GMT

John Willia

Verilog FAE Position available

Michael T.Y. McNama

0

401

Wed, 20 Nov 1996 04:56:18 GMT

Michael T.Y. McNama

Tourista, SNUG Tech Com., ESNUG Birds / Feather

John Cool

0

403

Wed, 20 Nov 1996 01:42:57 GMT

John Cool

 
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