triple-fault faulty 
Author Message
 triple-fault faulty

If it doesn't reset your computer, then your computer is faulty or at
least non-standard.

Btw, if you mask all the maskable interrupts, there won't be any IRQ
after "STI". And computer may reboot only if CPU encounter an "Int N"
instruction.
So are there ints masked before "CLI"?

Alexei A. Frounze

Quote:
> CLI
> mov word [IDTR],0
> lidt [IDTR]
> STI
> ... -> should i put something else?
> jmp $



Wed, 07 Aug 2002 03:00:00 GMT  
 triple-fault faulty


Quote:
> If it doesn't reset your computer, then your computer is faulty or at
> least non-standard.

   CPU doesn't reset itself upon tripple fault, it enters so-called
shutdown state. It's chipset's responsibility to detect the shutdown
state and drop RESET#. AT compatibles should indeed, as you say, reset
the CPU, but there are many claiming AT compatibility and not doing
that. Two of my boards at home (of 5) won't reset the CPU. This
discussion occured already several times and ended with agreement that
resetting through 8042 is more reliable.

-- http://bphantom.hypermart.net --

-- Too many flames with too much to burn
And life's only made of paper --

Sent via Deja.com http://www.deja.com/
Before you buy.



Thu, 08 Aug 2002 03:00:00 GMT  
 triple-fault faulty


Quote:
>    CPU doesn't reset itself upon tripple fault, it enters so-called
> shutdown state. It's chipset's responsibility to detect the shutdown
> state and drop RESET#. AT compatibles should indeed, as you say, reset
> the CPU, but there are many claiming AT compatibility and not doing
> that. Two of my boards at home (of 5) won't reset the CPU. This
> discussion occured already several times and ended with agreement that
> resetting through 8042 is more reliable.

What will happen on systems where triple faulting does not cause a system
reboot? Will the system just freeze?

Regards,
    Thomas



Thu, 08 Aug 2002 03:00:00 GMT  
 triple-fault faulty


Quote:
> What will happen on systems where triple faulting does not cause a
system
> reboot? Will the system just freeze?

   Yes.

-- http://bphantom.hypermart.net --

-- Too many flames with too much to burn
And life's only made of paper --

Sent via Deja.com http://www.deja.com/
Before you buy.



Sat, 10 Aug 2002 03:00:00 GMT  
 triple-fault faulty

Thomas Junge skrev i meddelandet ...
|

|
|>    CPU doesn't reset itself upon tripple fault, it enters so-called
|> shutdown state. It's chipset's responsibility to detect the shutdown
|> state and drop RESET#. AT compatibles should indeed, as you say, reset
|> the CPU, but there are many claiming AT compatibility and not doing
|> that. Two of my boards at home (of 5) won't reset the CPU. This
|> discussion occured already several times and ended with agreement that
|> resetting through 8042 is more reliable.
|
|What will happen on systems where triple faulting does not cause a system
|reboot? Will the system just freeze?

If no-one asserts RESET# or INIT#, then nothing's going to happen. You can
try this at home if your (PCI) chipset supports disabling special cycle
recognition. See your south-bridge chipset manual.



Sat, 10 Aug 2002 03:00:00 GMT  
 triple-fault faulty

Quote:
> If no-one asserts RESET# or INIT#, then nothing's going to happen. You can
> try this at home if your (PCI) chipset supports disabling special cycle
> recognition. See your south-bridge chipset manual.

Well, with "nothing" you imply that nothing useful will happen, do you? But
the CPU won't return to what it was executing before the TF, will it? (IMO I
can't, even if it would like to, is this correct?)

Regards,
    Thomas



Sat, 10 Aug 2002 03:00:00 GMT  
 triple-fault faulty


|
|> If no-one asserts RESET# or INIT#, then nothing's going to happen. You
can
|> try this at home if your (PCI) chipset supports disabling special cycle
|> recognition. See your south-bridge chipset manual.
|
|Well, with "nothing" you imply that nothing useful will happen, do you? But
|the CPU won't return to what it was executing before the TF, will it? (IMO
I
|can't, even if it would like to, is this correct?)

According to Intel, P5 60/66MHz CPUs can enter SMM when the CPU is in the
shutdown state, but the other P5 CPUs can't. Probably the same thing with
the P6 and Willamette too.

I've never tested this, so we'll have to trust the Intel docs :)



Sun, 11 Aug 2002 03:00:00 GMT  
 triple-fault faulty

Quote:
> According to Intel, P5 60/66MHz CPUs can enter SMM when the CPU is in the
> shutdown state, but the other P5 CPUs can't. Probably the same thing with
> the P6 and Willamette too.

Ok.

Quote:
> I've never tested this, so we'll have to trust the Intel docs :)

Suppose that'd be best, yes. Anyway, who would implement such stuff
intentionally? I doubt hardly anyone would. :-)
As long as almost every machine performs a reboot, I'm quite satisfied with
it.

Regards,
    Thomas



Sun, 11 Aug 2002 03:00:00 GMT  
 triple-fault faulty

linux reset just good.. and I think it uses triple-fault... minix also use
triple-fault to reset and it just work ok in my Pentium  233mhz.. I also it
reset good but when there is a task switch and then issuing a triple-fault
with in the new task... just hangs... but in my amd nope!!!



Tue, 13 Aug 2002 03:00:00 GMT  
 triple-fault faulty

[ d E S F a s a d o ] skrev i meddelandet ...
|
|linux reset just good.. and I think it uses triple-fault... minix also use
|triple-fault to reset and it just work ok in my Pentium  233mhz.. I also it
|reset good but when there is a task switch and then issuing a triple-fault
|with in the new task... just hangs... but in my amd nope!!!

Are you sure that triple faulting will reset your CPU? If so, show us the
code that doesn't work.



Tue, 13 Aug 2002 03:00:00 GMT  
 
 [ 10 post ] 

 Relevant Pages 

1. Local Descriptor Table(LDT) -> triple fault

2. Help, please! Entering pmode results in triple fault

3. Triple Fault

4. Control xfer Ring 0->, triple fault!!

5. OSDVL: Interrupts and Triple Bus Faults

6. Turbo-Fault--Fault Simulation

7. Clipper.lib Faulty

8. Faulty implementation or not?

9. faulty procedure

10. Faulty Pentiums

11. Faulty IFNAN in MS Fortran Powerstation?

12. Faulty languages and Liability

 

 
Powered by phpBB® Forum Software