bsr r1,r2 Heeeelp 
Author Message
 bsr r1,r2 Heeeelp

this instruction coming from an MASM program make a crash on NT  and 95 when
trying to assemble with TASM (normal mode).
What's the purpose of this instruction ?
Heeelp
Thank's in advance



Fri, 29 Jun 2001 03:00:00 GMT  
 bsr r1,r2 Heeeelp
it scans the bits in the 2nd operand from the most significant to the
least to check for a set bit.  If it finds a set bit, it'll load r1
with the bit #, and set zf accordingly.

The code BSR R1,R2 can be replaced with the following 8086 code,
assuming that the registers are 16 bit:

;-------------------------------------------------------------------

    push  R2          ; push the register we're checking
    push  cx          ; save the counter
    pushf             ; save the flags
    mov   cx,16       ; load counter with # of bits to check
search:
    shl   R2,1        ; check next bit(put it into carry)
    jc    found       ; bit = 1?
    loop  search      ; try again
    pop   cx          ; cx = flags
    and   cl,0f7h     ; make sure ZF is reset
    push  cx          ; push it again
    jmp   done        ; done -- couldn't find a set bit
found:
    dec   cx          ; cx-1 = 0 based index of set bit found
    mov   R1,cx       ; put it into R1.
    pop   cx          ; cx = flags
    or    cl,8        ; set ZF -- we found a set bit
    push  cx          ; save flags again
done:
    popf              ; restore flags with ZF set accordingly
    pop   cx          ; restore counter
    pop   R2          ; restore source

;------------------------------------------------------------------

Dave

Quote:

> this instruction coming from an MASM program make a crash on NT  and 95 when
> trying to assemble with TASM (normal mode).
> What's the purpose of this instruction ?
> Heeelp
> Thank's in advance




Fri, 29 Jun 2001 03:00:00 GMT  
 bsr r1,r2 Heeeelp
|this instruction coming from an MASM program make a crash on NT  and 95 when
|trying to assemble with TASM (normal mode).
|What's the purpose of this instruction ?

BSR means Bit Scan Reverse. It searches from the MSB (most signifcant
bit) to the LSB (least ... bit) until it finds a set bit. If it finds
one, it returns the bit number in Dest and ZF is cleared. If Src was
zero, Dest is undefined and ZF is set to 1.

Dest must be a general purpose register. Src can be a general purpose
register or memory.

    mov    ax,10000001b ;Bit 7 and 0 are set
    bsr    ax,ax    ;AX is now 7 and ZF=0

Download an intel manual (volume 2 of the Intel Architecture Software
developer's manual) http://developer.intel.com/



Fri, 29 Jun 2001 03:00:00 GMT  
 bsr r1,r2 Heeeelp

Quote:


> |this instruction coming from an MASM program make a crash on NT  and 95 when
> |trying to assemble with TASM (normal mode).
> |What's the purpose of this instruction ?

> BSR means Bit Scan Reverse. It searches from the MSB (most signifcant
> bit) to the LSB (least ... bit) until it finds a set bit. If it finds
> one, it returns the bit number in Dest and ZF is cleared. If Src was
> zero, Dest is undefined and ZF is set to 1.

> Dest must be a general purpose register. Src can be a general purpose
> register or memory.

>     mov    ax,10000001b ;Bit 7 and 0 are set
>     bsr    ax,ax    ;AX is now 7 and ZF=0

> Download an intel manual (volume 2 of the Intel Architecture Software
> developer's manual) http://developer.intel.com/

All correct, and good suggestions.

If you must support Pentium and 486DX cpus, then it can make sense to
use the fp unit instead of BSR, since this opcode was horribly slow
until the PPro came out:

; 32-bit input value in EBX, return value in EAX (-1 if EBX=zero)

; First check for zero or sign bit set:
  mov eax,-1
  mov [lTemp],ebx

  fild [lTemp]  ; 3 cycles, possible overlap?

  test ebx,ebx  ; Was the input positive and non-zero?
   jg usefp     ; If so, use the fp unit for MSB determination

  fstp st(0)    ; Fixup (pop) the fp stack!

  mov eax,-1
   jz done      ; Return -1 for a zero input

  and eax,31    ; otherwise the top bit was set
   jmp done

; Otherwise use the fp unit!
usefp:
  fstp [doubleTemp]
  mov eax,dword ptr [doubleTemp+4]
  shr eax,20            ; Align the exponent
  sub eax,1023          ; Remove the bias
done:

This looks like 9-10 cycles on a Pentium, a little more on a 486DX,
which is still better than BSR.

Terje

--

Using self-discipline, see http://www.eiffel.com/discipline
"almost all programming can be viewed as an exercise in caching"



Sat, 30 Jun 2001 03:00:00 GMT  
 bsr r1,r2 Heeeelp


Quote:
>; First check for zero or sign bit set:
>  mov eax,-1
>  mov [lTemp],ebx

>  fild [lTemp] ; 3 cycles, possible overlap?
>  test ebx,ebx ; Was the input positive and non-zero?
>   jg usefp    ; If so, use the fp unit for MSB determination
>  fstp st(0)   ; Fixup (pop) the fp stack!

>  mov eax,-1
>   jz done     ; Return -1 for a zero input
>  and eax,31   ; otherwise the top bit was set
>   jmp done

>; Otherwise use the fp unit!
>usefp:
>  fstp [doubleTemp]
>  mov eax,dword ptr [doubleTemp+4]
>  shr eax,20           ; Align the exponent
>  sub eax,1023         ; Remove the bias
>done:

 surely.......

 mov  [lTemp],ebx;            mov  eax,-1;
 fild [lTemp];                test ebx,ebx;
 fstp [dTemp];                jz   done;
 mov  eax,31;                 jl   done;
 mov  eax,dword ptr[dTemp+4]; /*******/
 shr  eax,20;                 /*******/
 sub  eax,1023;               /*******/
done:

--




Sun, 01 Jul 2001 03:00:00 GMT  
 bsr r1,r2 Heeeelp


Quote:
>If you must support Pentium and 486DX cpus, then it can make sense to
>use the fp unit instead of BSR, since this opcode was horribly slow
>until the PPro came out:

Ohh this brings up old time memories...

Here's my integer-only replacement for BSR from the good old days:

BSR_LUT db   0,0,1,1,2,2,2,2
        db   8 dup (3)
        db  16 dup (4)
        db  32 dup (5)
        db  64 dup (6)
        db 128 dup (7)

BSCR    MACRO
        XOR     ECX,ECX                 ;U
        CMP     EAX,1000000h            ;V
        SBB     ECX,ECX                 ;U
        CMP     EAX,10000h              ;V
        SBB     ECX,0                   ;U
        CMP     EAX,100h                ;V
        SBB     ECX,-3                  ;U
        SHL     ECX,3                   ;U
        SHR     EAX,CL                  ;NP
        ADD     CL,BSR_LUT[EAX]
BSCR    ENDM

Well, FWIW anyway.

Regards,

Michael Tippach



Sun, 01 Jul 2001 03:00:00 GMT  
 
 [ 6 post ] 

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