enabling the A20 line? 
Author Message
 enabling the A20 line?

How do you enable the a20 line? I've got code on it but I would like to
know exactly what going on? I read somewhere that you don't need to
enable it if you in protected mode... is that true?



Sun, 29 Nov 1998 03:00:00 GMT  
 enabling the A20 line?



Quote:
>How do you enable the a20 line? I've got code on it but I would like to
>know exactly what going on? I read somewhere that you don't need to
>enable it if you in protected mode... is that true?

There are articles on my web site that discuss protected mode
operation.  Source code is included, which also shows you how to enable
A20.

--
"Intel Secrets -- What Intel doesn't want you to know"    
HomePage:  http://www.x86.org       Anonymous FTP:  ftp://ftp.x86.org/pub/x86
-----------------------------------------------------------------------------



Mon, 30 Nov 1998 03:00:00 GMT  
 enabling the A20 line?

Jon> How do you enable the a20 line? I've got code on it but I would like to
Jon> know exactly what going on? I read somewhere that you don't need to

Usually it sends 0DDh or 0DFh to keyboard interface (8042 or 8742)
output port. It involves: waiting keyboard interface command and data
input registers to be empty, sending command (output it to port 64h;
seems the command is 0D1h), waiting again, sending data (port 60h),
and final waiting until data is accepted. A question I don't know
answer for: when keyboard interface input status changes, is the A20
enable/disable state already changed, or it happens later? It is
meaningless for slow CPU-s, but now 1us delay is important...

Jon> enable it if you in protected mode... is that true?

Usually going into protected mode includes the A20 enabling.



Tue, 01 Dec 1998 03:00:00 GMT  
 enabling the A20 line?

Quote:

>How do you enable the a20 line? I've got code on it but I would like to
>know exactly what going on? I read somewhere that you don't need to
>enable it if you in protected mode... is that true?

Um, what happens is that the a20 line is anded with a signal generated
by the keyboard controller to generate A20 to the memory.  So if the
keyboard controller is generating a 0 for this signal this is like
having the processor A20 line held low permanently.  The code you
have probably accesses the keyboard controller to set this signal either
high or low depending on your needs.  Note that some hardware doesn't
use the keyboard controller; but most of it does.

The A20 line has to be enabled if you want to use memory above 1 MB.
DOS extenders will enable it for you so you don't have to worry with it.

David



Tue, 01 Dec 1998 03:00:00 GMT  
 enabling the A20 line?

Quote:

>How do you enable the a20 line? I've got code on it but I would like to
>know exactly what going on? I read somewhere that you don't need to
>enable it if you in protected mode... is that true?

The A20 line is the 21st address bit.  It is normally disabled to
allow real-mode programs that use addresses like FFFF:FF00 to "loop
back" and access 0FEF0, like the 8086, instead of 10FEF0, as the 286
will do.  Unfortunately, this also terribly messes up protected mode
addressing; for instance, the address 300000 will address 200000 with
A20 off.  You definitely need to enable it to do anything useful in
protected mode.

This is a snippet of code that kicks you into PMODE/W.  I modified it
a bit for a flat real mode program, so it's kind of messy... FS is set
up as the 4GB selector.  I know you said that you have code, but this
code's really nice since it will try to use faster methods instead of
the keyboard, which is *very* slow.

;*****************************************************
;
; enablea20 from PMODE/W source code

enablea20:
        cli

        call    testa20

        in      al,92h                  ;try PS/2 style
        or      al,2
        jmp     short $+2
        jmp     short $+2
        jmp     short $+2
        out     92h,al

        call    testa20

        call    enablea20kbwait

        mov     al,0d1h
        out     64h,al
        call    enablea20kbwait

        mov     al,0dfh
        out     60h,al


        call    testa20

        in      al,40h
        jmp     short $+2
        jmp     short $+2
        jmp     short $+2
        in      al,40h

        in      al,40h
        jmp     short $+2
        jmp     short $+2
        jmp     short $+2
        in      al,40h
        cmp     al,ah




        sti
        clc

        sti
        stc
        ret

enablea20kbwait:

        jmp     short $+2
        jmp     short $+2
        jmp     short $+2
        in      al,64h
        test    al,2

        ret

;mine - you can see because it's messy

testa20:
        xor     ax,ax
        mov     es,ax
        mov     esi,100000h
        mov     di,0
        mov     cx,4000h
testa20_check_loop:
        mov     eax,es:dword ptr [di]
        cmp     fs:dword ptr [esi],eax
        jnz     testa20_ok
        add     di,4
        add     esi,4
        dec     cx
        jnz     testa20_check_loop
        stc                     ;a20 not enabled
        ret
testa20_ok:
        clc                     ;a20 enabled
        ret




Tue, 01 Dec 1998 03:00:00 GMT  
 enabling the A20 line?


Quote:
> and final waiting until data is accepted. A question I don't know
> answer for: when keyboard interface input status changes, is the A20
> enable/disable state already changed, or it happens later? It is
> meaningless for slow CPU-s, but now 1us delay is important...

 A method I am using successfully for years now is to wait for the empty
input buffer, then issue command 0FFH and wait for the empty IB again.
Note, that 0FFH is effectively a NOP. I have met motherboards on which
there was a noticeable delay between releasing the input buffer after
changing the value of the output port and changing the status of the A20
line gate. Issuing 0FFH is one of the methods M$'s HIMEM.SYS uses.

 I hope this explains the matter.

 BTW, for all Intel processors that handle this gate internally through
the A20M# line (i.e. i486 and higher), it is documented that in the
protected mode asserting this line leads to unpredictable results.

--
+         Maciej W. Rozycki, Technical University of Gdansk, Poland          +
+----------------------------------------------------------------------------+



Wed, 02 Dec 1998 03:00:00 GMT  
 
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