Task switching problems!... 
Author Message
 Task switching problems!...

Hallo 2 everyone!
I've two strange problems about task switching, I hope somebody helps me...
This is the scenario: I set up a task that is going to be executed at PL 3.
I provide  a private page dir/page table structure for the new task. All
pages should be readable regardless of the bit 1 and 2 of page/dir entries.
 When I try to execute the new task the computer reboots.
The SAME task, now it's TSS is set up to use the kernel page / dir tables,
ready to run at PL 3.
 The task runs happily.
Again, the SAME task with the SAME previuos private PBDR set up to run at PL
0.
 The task runs!
I think that there is a protection error or a triple fault but I can't find
it!
To be more exhaustive: I defined a flat memory model CS=DS=all addresses
from 0 to 16 Mb in my 486 for the kernel, the task has CS=DS=0 -> to 50K.
May be this segment overlapping (I mean the memory from 0 -> 50K shared
among the kernel and the task) be the cause of the fault???
The second problem is that that the new task CS seems to be declared as
nonconforming else I get a TSS error (or another fault).

Thanks for the time spent reading, sorry for my (bad) english, hope to be
clear:),

Matteo



Sat, 09 Oct 2004 00:59:09 GMT  
 Task switching problems!...
Just a guess, but perhaps the the DPL (and RPL) of the stack selector
doesn't match the PL at which you're trying to run.

If I understand what you're trying to do, the rules for SS as it appears
in the incoming TSS are as follows:

RPL of SS == DPL of CS
DPL of SS == DPl of CS

That is, for an incoming TSS at PL3, the DPL bits in the GDT/LDT for the
stack selector must be 3, and the RPL (low-order two bits) of SS as it
is stored in the TSS must be 3.

Unfortunately, there are many, many reasons why such a task switch can
go poof, so this is just a guess.

Quote:

> Hallo 2 everyone!
> I've two strange problems about task switching, I hope somebody helps me...
> This is the scenario: I set up a task that is going to be executed at PL 3.
> I provide  a private page dir/page table structure for the new task. All
> pages should be readable regardless of the bit 1 and 2 of page/dir entries.
>  When I try to execute the new task the computer reboots.
> The SAME task, now it's TSS is set up to use the kernel page / dir tables,
> ready to run at PL 3.
>  The task runs happily.
> Again, the SAME task with the SAME previuos private PBDR set up to run at PL
> 0.
>  The task runs!
> I think that there is a protection error or a triple fault but I can't find
> it!
> To be more exhaustive: I defined a flat memory model CS=DS=all addresses
> from 0 to 16 Mb in my 486 for the kernel, the task has CS=DS=0 -> to 50K.
> May be this segment overlapping (I mean the memory from 0 -> 50K shared
> among the kernel and the task) be the cause of the fault???
> The second problem is that that the new task CS seems to be declared as
> nonconforming else I get a TSS error (or another fault).

> Thanks for the time spent reading, sorry for my (bad) english, hope to be
> clear:),

_________________________________________


I've been getting a lot of junk e-mail lately,
so to reply to me directly, delete "despam".



Sat, 09 Oct 2004 03:56:11 GMT  
 Task switching problems!...

Quote:

> If I understand what you're trying to do, the rules for SS as it appears
> in the incoming TSS are as follows:

> RPL of SS == DPL of CS
> DPL of SS == DPl of CS

> That is, for an incoming TSS at PL3, the DPL bits in the GDT/LDT for the
> stack selector must be 3, and the RPL (low-order two bits) of SS as it
> is stored in the TSS must be 3.

Thanks 4 your hints! I'll try them as soon as possible!

                                                                Matteo



Mon, 11 Oct 2004 00:51:57 GMT  
 
 [ 3 post ] 

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