configuration statement does not see component instantiation label when within generate loop 
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 configuration statement does not see component instantiation label when within generate loop

I cannot succussfully compile nor synthesize ( I'm using Cadence's tools) when a generic component is instantiated within a
generate statement. The problem actually occurs it seems at the configuation statement.

        for example:

        for input_register : datareg use entity mylib.datareg(simple);  -- config satement

        begin
                data_input_registers :  for i in 0 to 7 generate        
                        input_register : datareg generic map (8) port map (
                                                data_in,data_out,clk,out_enable);
                end generate data_input registers;

        end;

The component instantion of input register compiles successfully if it is not in a genrate loop. The error I get is at the config
statement  complaining that input_register is not an instantiation label. It appears that THE label get masked  when in a
generate.

 ANY IDEAS  ON WHAT I MIGHT BE DOING WRONG!!!!!!!!!!!!!



Thu, 10 Jun 1999 03:00:00 GMT  
 configuration statement does not see component instantiation label when within generate loop

Quote:

> I cannot succussfully compile nor synthesize ( I'm using Cadence's tools) when a generic component is instantiated within a
> generate statement. The problem actually occurs it seems at the configuation statement.

>         for example:

>         for input_register : datareg use entity mylib.datareg(simple);  -- config satement

>         begin
>                 data_input_registers :  for i in 0 to 7 generate
>                         input_register : datareg generic map (8) port map (
>                                                 data_in,data_out,clk,out_enable);
>                 end generate data_input registers;

>         end;

> The component instantion of input register compiles successfully if it is not in a genrate loop. The error I get is at the config
> statement  complaining that input_register is not an instantiation label. It appears that THE label get masked  when in a
> generate.

>  ANY IDEAS  ON WHAT I MIGHT BE DOING WRONG!!!!!!!!!!!!!

Yes, the config statement must be in the same declarative part than the label,
and the generate statements opens a new one.
Solutions:

1- have a block within the generate statement, and configure inside.

 for... generate
   block
     for label: ... use ...
   begin
     label:
   end block;
 end generate;

2- buy a VHDL'93 compliant system :), in which generates may have begins.

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Thu, 10 Jun 1999 03:00:00 GMT  
 configuration statement does not see component instantiation label when within generate loop

Quote:

>The component instantion of input register compiles successfully if it is not in a genrate loop. The error I get is at the config
>statement  complaining that input_register is not an instantiation label. It appears that THE label get masked  when in a
>generate.

The generate block is another level of scoping and you need to include
it in the configuration statement.

_____




Fri, 11 Jun 1999 03:00:00 GMT  
 
 [ 3 post ] 

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