Conditional Signal Assignments inside Processes? 
Author Message
 Conditional Signal Assignments inside Processes?

Hi,
        I've been trying to use a conditional signal assignment inside a
process, for example:

architecture fred of example is
...
signal foo : std_logic_vector(2 downto 0);
...
begin
...
  process p
     variable bar1, bar2, ... , barN : std_logic;
  begin
     ...
     ... some stuff which sets bar1...N
     ...
     foo <= "010" when bar1 = '1' else    -- (1)
            "011" when bar2 = '1' else
            "101" when bar2 = '1' else
            ...
            "111" when barN = '1' else
            "000";
     ...
  end process;
...
...

        But the compiler doesnt like it. The error messages I get are that
there's a semicolon missing from the line marked (1), and then other
equally invalid errors for the following lines of the conditional
assignment. The impression that I get from this and my reference book is
that conditional assignments aren't legal inside processes. Is this the
case? If so, why?
        I've replaced this with a buch of if...elsif...elsif...else which works
fine, but the conditional assignment seemed much neater (and involved a
lot less typing effort!).

TIA,
   Chris



Mon, 29 Jul 2002 03:00:00 GMT  
 Conditional Signal Assignments inside Processes?
"Softley, C." a crit :

Quote:

> Hi,
>         I've been trying to use a conditional signal assignment inside a
> process, for example:
>   process p
>      variable bar1, bar2, ... , barN : std_logic;
>   begin
>      ...
>      ... some stuff which sets bar1...N
>      ...
>      foo <= "010" when bar1 = '1' else    -- (1)
>             "011" when bar2 = '1' else
>             "101" when bar2 = '1' else
>             ...
>             "111" when barN = '1' else
>             "000";
>   end process;
>         I've replaced this with a buch of if...elsif...elsif...else which works
> fine, but the conditional assignment seemed much neater (and involved a
> lot less typing effort!).

Hi

You can NOT do this. The conditionnal assignment is a concurrent
expression, which MUST be used OUTSIDE of a process. For use INSIDE a
process, you have to use a cascade of IF THEN ELSE.
It is a VHDL feature.

Nicolas MATRINGE           DotCom S.A.
Conception electronique    16 rue du Moulin des Bruyeres
Tel 00 33 1 46 67 51 11    92400 COURBEVOIE
Fax 00 33 1 46 67 51 01    FRANCE



Mon, 29 Jul 2002 03:00:00 GMT  
 Conditional Signal Assignments inside Processes?
Hi Chris,
       You have correctly figured out that "Conditional Signal
Assignments are illegal inside a process", they are concurrent
constructs, equivalent of a Process with a proper sensitivty
list.

  They are just 2 different ways of modelling the same thing.
Each has its own advantage/disadvantage. For instance a simple
counter (Synchronous, with reset) can best be modelled by a
process than with Conditional Signal Assignment. Whereas you have
come up with an example where the choice is the other way around.

   You could use CASE statments instead of a bunch of
if-elsif-else constructs. I prefer this *when* the choices are
mutually exclusive. Of-course you will have to see if you wish a
"priority encoding".

Hope this helps.

Kind Regards,
Srini


Quote:

>Hi,
>    I've been trying to use a conditional signal assignment
inside a
>process, for example:

>architecture fred of example is
>....
>signal foo : std_logic_vector(2 downto 0);
>....
>begin
>....
>  process p
>     variable bar1, bar2, ... , barN : std_logic;
>  begin
>     ...
>     ... some stuff which sets bar1...N
>     ...
>     foo <= "010" when bar1 = '1' else    -- (1)
>            "011" when bar2 = '1' else
>            "101" when bar2 = '1' else
>            ...
>            "111" when barN = '1' else
>            "000";
>     ...
>  end process;
>....
>....

>    But the compiler doesnt like it. The error messages I get
are that
>there's a semicolon missing from the line marked (1), and then
other
>equally invalid errors for the following lines of the
conditional
>assignment. The impression that I get from this and my reference
book is
>that conditional assignments aren't legal inside processes. Is
this the
>case? If so, why?
>    I've replaced this with a buch of

if...elsif...elsif...else which works

Quote:
>fine, but the conditional assignment seemed much neater (and
involved a
>lot less typing effort!).

>TIA,
>   Chris

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Mon, 29 Jul 2002 03:00:00 GMT  
 Conditional Signal Assignments inside Processes?

Quote:

> You can NOT do this. The conditionnal assignment is a concurrent
> expression, which MUST be used OUTSIDE of a process. For use INSIDE a
> process, you have to use a cascade of IF THEN ELSE.
> It is a VHDL feature.

Any idea what the rationale was for not allowing a conditional
assignment as a sequential statement?


Mon, 29 Jul 2002 03:00:00 GMT  
 Conditional Signal Assignments inside Processes?
On 10 Feb 2000 13:39:58 -0800, Eric Smith


Quote:
> Any idea what the rationale was for not allowing a conditional
> assignment as a sequential statement?

Occam's Razor?

The conditional assignment syntax is less general than an if statement.

However, I agree that it might be convenient at times.

If you'd like to see conditional assignment as a sequential statement,
visit my web site (www.mench.com) and click over to the "VHDL change
request" form on vhdl.org.

Regards,

Paul

--
Paul Menchini   |  "Outside of a dog, a book is probably man's
Cadence PDS     |   best friend, and inside of a dog, it's too

www.orcad.com   |     --Groucho Marx



Mon, 29 Jul 2002 03:00:00 GMT  
 Conditional Signal Assignments inside Processes?


Quote:

>> You can NOT do this. The conditionnal assignment is a concurrent
>> expression, which MUST be used OUTSIDE of a process. For use INSIDE a
>> process, you have to use a cascade of IF THEN ELSE.
>> It is a VHDL feature.

>Any idea what the rationale was for not allowing a conditional
>assignment as a sequential statement?

When I think about, you could ask the opposite question too.  What is the
rationale for not allowing IF statements outside of a process?  Then
you could let the compiler worry about the sensitivity lists for things
that you have to write a process for now.  For example:

PROCESS (A, B, C, AVEC, salami)
BEGIN
  IF (A = '1' AND B = '0' AND AVEC = "0000000") THEN
    out <= "00";
  ELSIF (A = '0' AND B = '1') THEN
    out <= "01";
  ELSIF (c = '1') THEN
    out <= "10";
  ELSE
    out <= salami;
  END IF;
END

I could recode the above using WHEN, but it would be pretty ugly.
It's pretty common to make a change by adding another signal, and then
make a bug by forgetting to add it to the sensitivity list.  Why not just
allow IF's as concurrent statements, and let the compiler generate the
sensitivity list.  Certainly there are plenty of lint tools that are already
that smart.

The same thing goes for CASE and FOR loops.

Steve
--

StrongARM 2 Architecture and Core Design
Not Speaking for Intel                   http://www.strazdus.com



Tue, 30 Jul 2002 03:00:00 GMT  
 
 [ 6 post ] 

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