Board index » vhdl

All times are UTC



 VHDL models of Phase-Locked Loops 
Author Message
Simon Cur
#1 / 1
 VHDL models of Phase-Locked Loops

Does anyone have VHDL (Behavioural) models of Phase-Locked Loops. I
know that VHDL PLL models were successfully tried out at IBM, but have
no idea who was responsible.

--
Simon Curry     Bell-Northern Research Ltd, Stop 49   Ph.: (613) 763-2981
VHDL Tools          P.O. Box 3511, Station C          Fax: (613) 763-7241
                  Ottawa, Ontario, Canada, K1Y 4H7  Flame: 1-800-DEV-NULL



Sun, 14 Nov 1993 05:59:59 GMT  
 
 Page 1 of 1
  [ 1 post ] 

 Relevant Pages 

1. digital phase-lock loop

2. Design of Phase-Locked Loop (PLL) - 2 alternatives

3. Looking for Phase-Locked-Loop Design

4. Ada tasks/2 phase locking/client/server

5. c model convert to verilog/VHDl model

6. FTP Site for VHDL models in THE VHDL HANDBOOK, by David Coelho

7. Recursive VHDL models - how to prang your VHDL tools

8. Is anybody that know ADPLL(all digital Phase Locked Loop)?

9. num lock, caps lock, scroll lock lights

10. Delay Lock Loop

11. Object models, Domain models, Application models, and MVC?

12. emacs vhdl font lock wanted

  

 
Powered by phpBB® Forum Software