COURSES: High Level Design Using VHDL, Advanced Techniques Using VHDL, Portland, OR 
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 COURSES: High Level Design Using VHDL, Advanced Techniques Using VHDL, Portland, OR

                              A N N O U N C E

Qualis Design Corporation will be offering additional sessions of its popular
courses "High Level Design Using VHDL", and "Advanced Techniques Using VHDL"
at our Beaverton, Oregon, facility throughout 1996.

Our course "High Level Design Using VHDL" presents a comprehensive
introduction to VHDL and shows the student how to approach complex
design tasks using High Level Design methods.  The course "Advanced
Techniques Using VHDL" leverages off the student's foundation in VHDL
to teach advanced design and verification methods.  Both courses provide
high leverage knowledge for board, ASIC and FPGA designers.  For additional
information about the material covered in these leading-edge courses, see
the course descriptions below.

These courses can also be held at your facilities in a private, one-on-one
setting -- contact us for more information.

The Portland course schedule for June through December follows:

       Course Title                        Course Dates
       ----------------------------------------------------------

       High Level Design Using VHDL:       Aug 05 - Aug 09
                                           Sep 23 - Sep 27
                                           Nov 04 - Nov 08

       Advanced Techniques Using VHDL:     Jun 18 - Jun 20
                                           Sep 30 - Oct 02
                                           Nov 13 - Nov 15

For information about the material covered in these leading-edge courses,
see the course descriptions below.

The Qualis Difference
---------------------
We know what it's like to work under the pressure of aggressive schedules and
immense technical challenges.  We believe that High Level Design methods
and technology, such as HDL-based verification and synthesis, are the key
to tackling those challenges and conquering today's design problems.
Our courses can really make a difference in your day-to-day work life
by showing you the high leverage points of VHDL and High Level Design.
Here's how we do it:

 -- The Qualis "Best In Class" Instructor Team draws upon the absolute best
    VHDL and Verilog consulting and training talent available.  Our
    instructors, top-notch Engineers with cutting-edge design experience,
    know how to relate the course material to your real-world design problems.

 -- Our courses are intense, hands-on events using the latest EDA tools
    and hardware.  Everything you need to learn quickly and efficiently is
    provided -- you supply the brain, we'll supply everything else.

 -- Our courses are like no other in the EDA industry.  Engineers and
    Managers who attend our courses will learn what's important and why, and
    where to focus their time and resources for maximum leverage from HDLs
    and design tools.  And, unlike other vendor courses, our courses are
    *dynamic* -- we constantly update our material with the latest in
    High Level Design techniques and information, so you're assured of
    learning the latest in the field.

--  Our courses are respected in the industry.  We have taught our
    High Level Design courses to dozens of companies and hundreds of
    Engineers and Managers.  Our student references attest to the
    outstanding quality and real-world usefulness of our classes.

About Qualis Design Corporation
-------------------------------
Founded in 1992, Qualis Design Corporation has quickly become the
leading independent provider of High Level Design consulting and
training services.  The company provides services to leading-edge
high technology firms worldwide, including Intel, Hewlett-Packard,
Tektronix, Xerox, TRW, Northern Telecom and Bell-Northern Research.
Qualis' corporate headquarters are located in Beaverton, Oregon.

Don't miss this opportunity to learn the latest in High Level Design from
the best in the industry.  For course syllabi and registration information,
contact us at:

                           Qualis Design Corporation
                    15455 NW Greenbrier Parkway, Suite 250
                       Beaverton, Oregon 97076-4444 USA

                            Phone: +1-503-531-0377
                             FAX: +1-503-629-5525

                         World Wide Web: coming soon!

Brief Course Descriptions
--------------------------

                    High Level Design Using VHDL

                          Course Overview

           Copyright (c) 1995, 1996 Qualis Design Corporation

"High Level Design Using VHDL" is a fast paced, 5-day hands-on,
multimedia courses designed not only to teach High Level Design
techniques and the VHDL language, but to make class participants
immediately productive in a system design environment using
state-of-the-art simulation and synthesis tools.

After an introduction to VHDL, the course deviates from the
traditional bottom-up, gates-to-behavi{*filter*}modeling presentation of
other VHDL courses and reverses the flow, teaching top-down
design practices, with early special emphasis on coding for synthesis,
efficient testbench generation and advanced design verification
techniques. These skills are reinforced throughout the week while
teaching VHDL from a High Level Design perspective.

The course labs are designed to accommodate the learning aptitudes of
a wide range of students with diverse design experiences. Each lab is
structured into three parts:

     1.        Fundamental Concepts Review and Experience
     2.        Recognition of Common Mistakes and Correcting Problems
     3.        Additional Material for Advanced Students

All students complete parts one and two of each lab.  Part three is
for students who finish early and want to learn additional material.
This lab structure caters to all student skill levels and provides
excellent opportunities to expand one's knowledge of VHDL simulation
and synthesis techniques.

Each day of class is divided into multiple interactive lecture and
lab sessions.  Students have access to individual Sun Sparcstations,
the VHDL simulation environment of their choice, and the Synopsys
DC Expert synthesis environment for use during the lab sessions.
The course material is presented using a projection system that allows
30% more material to be presented in a given amount of time with vivid,
interest-grabbing color slides.

Full Course Syllabus Available
------------------------------
A full course syllabus listing all topics covered in this course is available.
Contact us for more information.

------------------------------------------------------------------------------

                   Advanced Techniques Using VHDL

                          Course Overview

             Copyright (c) 1996 Qualis Design Corporation

"Advanced Techniques Using VHDL" is a fast paced, 3-day hands-on,
multimedia courses designed to bring Engineers with experience in
using VHDL to an unparalleled level of efficiency.

After a review of the more advanced behavi{*filter*}constructs and
features of VHDL, the course immediately illustrates how these
constructs can turn an ordinary-looking environment into a design
simulation and verification powerhouse through the use of
bus-functional models, test harnesses, abstract regressionable
testbenches and behavi{*filter*}models.

Each day of class includes interactive lecture sessions with
8 challenging labs.  Students will have access to individual Sun
Sparcstations and the VHDL simulation environment of their
choice.  The course material is presented using a projection
system that allows 30% more material to be presented in a given amount
of time with vivid, interest-grabbing color slides.

Student Questions
-----------------
Prior to the first day of the course, registered students are
encouraged to submit questions related to their current usage
of VHDL to the instructor.  Questions or topics that illustrate
modeling techniques or features of the language will be included
in the course presentation.

Course Prerequisites
--------------------
Students are expected to have prior experience with the VHDL language,
or previously attended the Qualis course "High Level Design Using VHDL".
Knowledge of a structure programming language, such as C or Pascal,
is recommended.

Full Course Syllabus Available
------------------------------
A full course syllabus listing all topics covered in this course is available.
Contact us for more information.

------------------------------------------------------------------------------

                           Qualis Design Corporation
                    15455 NW Greenbrier Parkway, Suite 250
                       Beaverton, Oregon 97076-4444 USA

                            Phone: +1-503-531-0377
                             FAX: +1-503-629-5525

                         World Wide Web: coming soon!

"DC Expert" is a trademark of Synopsys, Inc.
"Verilog" is a registered trademark of Cadence Design Systems, Inc.

Copyright (c) 1995, 1996, Qualis Design Corporation.  All Rights Reserved.



Wed, 25 Nov 1998 03:00:00 GMT  
 
 [ 1 post ] 

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