
compiler for vhdl/verilog to C
Quote:
> Of course, it would be nice to have a scheme where I could
> write plain 'ole C code, link it with a scheduling library that handles the
> parallel constructs, and go from there...
Well actually ... such a product does exist. It's called FPL and is a behavioural
modelling language implemented as a true superset of C. You even get to debug it
under ups :-). To be exact there isn't a scheduling library, the compiler
generates a distributed scheduler into the code at compile time. This helps to
keep the code readable because you dont see calls to the dispatcher all over the
place. Its not generally available (yet) but I'm working on it (read - hunting
for big companies to support the research).
Craig Amey
Department of Computer Science
Adelaide University