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1. Need VSI specification for VHDL macros !!!
2. VHDL Macros
3. A macro involving two sub-macros - where the 2nd macro needs results from the first
4. Verilog model of Xilinx macro in VHDL Testbench fails
5. Macro/Function in VHDL testbench ?
6. Verilog model of Xilinx macro in VHDL Testbench fails
7. Tgrind macros for VHDL?
8. How to use macro in VHDL?
9. macro -vs- macro/codeblock
10. Help with macros writing macros in Bigloo
11. syntax-rules macros with sub-macros
12. Scheme macro source: rewriter-widget, a widely applicable macro interface
VHDL macros