FAQ general (1 of 3) 
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 FAQ general (1 of 3)

This is a monthly posting to comp.lang.vhdl containing general informations
Please send additional information directly to the editor:

Last edited: august 1993 (Thanks for all corrections)
corrections and suggestions are appreciated.
There are other regular postings about books and products.

Contents
0. General Information/Introduction
0.1 The Group - why and what
0.2 What is VHDL
0.3 Before posting

1. Abbreviations

2. Official Contacts

3. frequently asked questions
3.1 About Changes to the VHDL Standard
3.2 USE of library elements?
3.3 PUBLIC DOMAIN Tools?
3.4 VHDL Validation Suite available?
3.5 Status of analog VHDL (AHDL, 1076.1)
3.6 How can people get more information about AHDL (1076.1)

There are two other monthly postings containing informations about
products, books
***************************************************************************
0. General Information/Introduction
***************************************************************************
0.1 The Group - why and what
The newsgroup comp.lang.vhdl was created in January 1991. It's an
international forum to discuss ALL topics related to the language VHDL which
is actually defined by the IEEE Standard 1076/87.
Included are language problems, tools that only support
subsets etc. NOT other languages such as Verilog HDL. This is not strict -
if there is the need to discuss information exchange from EDIF to VHDL for
example, this is a topic of the group. The group is unmoderated. Please
think carefully before posting - it costs a lot of money! (Take a look into
your LRM for example - if you still cannot find the answer, post your
question, but make sure, that other readers will get the point).
A chapter for frequently asked questions about the language will later be
added to this regularly posted information - as they appear on the net. If
necessary for the amount of information, this posting will possibly be split
into separate postings for each chapter.

0.2 What is VHDL
VHDL-1076 (VHSIC (Very High Speed Integrated Circuits) Hardware Description
Language) is an IEEE Standard since 1987. It is "a formal notation intended
for use in all phases of the creation of electronic systems. ... it supports
the development, verification, synthesis, and testing of hardware designs,
the communication of hardware design data ..." [Preface to the IEEE Standard
VHDL Language Reference Manual] and especially simulation of hardware
descriptions. Additionally VHDL-models are a DoD requirement for vendors.

Today simulation systems and other tools (synthesis, verification and others)
based on VHDL are available. The VHDL users community is growing fast.
Several international conferences organized by the VHDL Users Groups(s) have
been held with relevant interest. Other international conferences address the
topic with growing interest as well (Conference on Hardware Description
Languages -CHDL-, [European] Design Automation Conference -[Euro]DAC ...).

0.3 Before posting
- read the 3 FAQ articles - they possibly answer your questions
- question about the language: try to find out in your LRM

***************************************************************************
1. Abbreviations
***************************************************************************
AHDL:   Analog Hardware Description Language, s. VASAG
BBS:    Bulletin Board System
DoD:    USA Department of Defense
IEEE:   The Institute of Electrical and Electronics Engineers
        In case of VHDL, they defined the standard 1076
LRM:    Language Reference Manual
TISSS:  Tester Independent Support Software System
VASAG:  VHDL Analog SubPAR Analysis and Standardization Group
VASG:   VHDL Analysis and Standardization Group
VFE:    VHDL Forum Europe
VHDL:   VHSIC Hardware Description Language
VHSIC:  Very High Speed Integrated Circuits - A program of the DoD
VI:     VHDL International
VUG:    VHDL User's group. See below.
VIUF:   VHDL International Users Forum
VUG:    VHDL Users Group, see below
WAVES:  Waveform Vector and Exchange Specification, proposed IEEE Standard

***************************************************************************
2. Official Contacts
***************************************************************************

VHDL User's group. VHDL International Users Forum
    The first (VUG) was transformed into the second (VIUF) in 1991.
    VIUF is Chaired by Allen M. Dewey and is a chapter and thus sponsored by
    VHDL International (VI).
    They organize conferences, send a newsletter (paper)
    and have some other activities.
        Point of contact is:

VHDL-Forum for CAD in Europe (VFE) is the European users group active in
    VHDL related topics & standardization efforts. VFE is open to all
    intereseted paticipants.
    Contact:
        Andreas Hohl (Chair)
        SIEMENS, Dept. ZFE IS EA Ref
        Otto-Hahn-Ring 6
        81739 Munich
        Germany
        Phone: +49-89-636-41895
        Fax:   +49-89-636-44950

VHDL Newsletter
  Editor of the US Newsletter:

  Europe
    Editor of the European Newsletter
        J. Mermet, J. Rouillard
        Phone: 3+91 05 44 44, FAX 33+91 05 43 43
        Institut Mediterraneen de Technologie
        Technopole de Chateau-Gombert
        13415 Marseille cedex -FRANCE-

mailing list/ftp addresses


    Mail a request to be added to the group of registered news subscribers

    One can access the files online by "ftp"ing to account



VASAG the AHDL, 1076.1 Study group
    The 1076.1 study group is maintaining an email bulletin board for
    distribution of announcements and as a forum for technical discussions.
    There are two email addresses that can be used to access this facility.
    The addresses and their respective coordinators are as follows:

    Contact:   Wojtek Sakowski
               IMAG Institute, University of Grenoble, France


    Contact:   Rajeev Madhavan
               Cadence Design Systems

This posting/FAQ
    Thomas Dettmer, University of Dortmund, Dept. of Computer Science I
    D44221 Dortmund (Germany)
    Phone: +49-231 755 6464,  FAX: +49-231 755 6555

***************************************************************************
3. frequently asked questions
***************************************************************************
There's not much until today - but I included those questions I've often
heard from beginners. If someone feels, that a point should be included,
please let me know.

3.1 About Changes to the VHDL Standard!
According to IEEE rules every five years a standard has to be reproposed and
accepted. This can include changes. Because VHDL is relativly young, the
restandardisation in 1992 included changes, and it will in 1997.
Changes in VHDL92 include: groups, private types, shared variables,
inclusion of foreign models in a VHDL description, shift operators, support
of pulse rejection by a modified delay model, more syntactic consistency.
First adopted tools are expected in winter 1993/4 -correct me if I'm wrong.

3.2 USE of library elements?
Often users believe, they can use names of libraries /= work by simply
inserting a use clause in the source. The analyzer responds with error
messages.
Insert a library clause before the use clause and all
should work fine. (See your LRM for details).

3.3 PUBLIC DOMAIN Tools?
Actually as far as I know, there is only few PD software on VHDL. If YOU
know about something, please let us know.
See products posting for more detailed information.

3.4 VHDL Validation Suite available?
YES. free for universities and $2000 for companies and governmental agencies.
see monthly posting on products. (This info maybe a bit out of date - as far
as I know there is a new approach to build such a suite - or is it a
continuation of the same?)

3.5 Status of analog VHDL (AHDL, 1076.1)
Language Design has just begun. The goal of the 1076.1 effort is to produce
an approved standard LRM by the end of 1994.

3.6 How can people get more information about AHDL (1076.1)
The 1076.1 study group is maintaining an email bulletin board for
distribution of announcements and as a forum for technical discussions.
see above (official contacts).

tom

--

phone: +49-231 755 6464, FAX: +49-231 755 6555
T. Dettmer, Dortmund University, Computer Science I, 44221 Dortmund, Germany



Sat, 20 Jan 1996 15:48:48 GMT  
 
 [ 1 post ] 

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