VHDL, ModelSIm, ports and signals?? 
Author Message
 VHDL, ModelSIm, ports and signals??

We are using ModelSim and when we connect a signal to a port through an
assignment statement, (i.e. port<=signal;) the port gets the signal's
value, but the signal doesn't get the port's value even if the port is
of type inout. Is that how VHDL and simulator's are suppose to work?
This doesn't represent a connection very well.


Mon, 27 Jan 2003 03:00:00 GMT  
 VHDL, ModelSIm, ports and signals??
Hi craig,

even when your port assignment is bidirectional (inout) a signal
assignment is not.
Maybe one workaround is this :

port <= signal ;
signal <= port;

...implemented as concurrent assignments !!!

But remember...
real hardware (ICs) always has drivers for each direction and for a
digital port to become an real input the output driver has to be disabled
(Trisate). Therefore digital circuit ports never act as wires.

But for simulation purposes alone the above should work.

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VHDL, ModelSIm, ports and signals??:
Quote:
> We are using ModelSim and when we connect a signal to a port through an
> assignment statement, (i.e. port<=signal;) the port gets the signal's
> value, but the signal doesn't get the port's value even if the port is
> of type inout. Is that how VHDL and simulator's are suppose to work?
> This doesn't represent a connection very well.



Mon, 27 Jan 2003 03:00:00 GMT  
 VHDL, ModelSIm, ports and signals??
Hi,
As far as I know you can assign Input and bidirectional port to a signal
directly and simulator is happy with it. I have not face any problem with
Leapfrog and NCSim so far..
If you can send me your code, I can try that here..
hope this helps
Sanjay


Quote:
> We are using ModelSim and when we connect a signal to a port through an
> assignment statement, (i.e. port<=signal;) the port gets the signal's
> value, but the signal doesn't get the port's value even if the port is
> of type inout. Is that how VHDL and simulator's are suppose to work?
> This doesn't represent a connection very well.



Tue, 28 Jan 2003 03:00:00 GMT  
 
 [ 3 post ] 

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