Creating a two-dimensional array of integers 
Author Message
 Creating a two-dimensional array of integers

I am working on a project in which, among other things, it is
necessary to multiply a 2-dimensional array of integers (8x8) by a
std_logic_vector(0 TO 7) in VHDL.  The problem seems to be in the
creation of a type that is either 1) an array of arrays of integers or
2) a two-dimensional array of integers, both of which (I need only one
declaration) are meant to create the aforementioned 2-d array, or
matrix.  Can anyone tell me how to create such a matrix, preferably
one that stores integers rather than std_logic_vectors?  The following
is what I have tried.

Attempt 1:
  TYPE int_matrix IS ARRAY (0 to 7, 0 to 7) OF INTEGER RANGE -3 TO 3;
  VARIABLE weight_matrix :      int_matrix;

Attempt 2:
  TYPE int_vect IS ARRAY (0 TO 7) OF INTEGER RANGE -3 TO 3;
  TYPE int_matrix IS ARRAY (natural RANGE <>) OF int_vect;
  VARIABLE weight_matrix :      int_matrix(0 TO 7);

I have the first parts of these code snippets (TYPE lines) inside of a
package, which is used to define this matrix type and to overload the
multiplication operation using (l: int_matrix, r: STD_LOGIC_VECTOR(0
TO 7)).  The package compiles without error in Altera's Max+plusII

The part of my code that uses the package, not the package itself, is
the source of an error during compilation when the line containing the
multiplication (of the matrix and the vector) is reached.  Both
versions of matrix declarations used above produce the same error -
"Arrays with two dimensions are supported only if the subelement is
represented by one bit."  What do they mean by "subelement," and how
can I get around this?  It seems very simple, but I am at a loss for
what to do.  One possible work-around that I'm looking into is using a
64-bit vector of ints rather than an 8x8 matrix, but I know that there
must be a way to use 2-D arrays.  Thanks.

Fri, 16 Sep 2005 15:15:09 GMT  
 Creating a two-dimensional array of integers

> "Arrays with two dimensions are supported only if the subelement is
> represented by one bit."  What do they mean by "subelement," and how
> can I get around this?

I'll have to guess at this one, but I assume the Altera compiler only accepts
two dimensional arrays of bit, std_logic, bool, etc. In other words:
subelements that can be represented by 1 bit. It appears to me a limitation of
the Altera compiler, though I'm not sure Synopsys would allow this.

Also, a little warning: 4 bits signed (which is probably what the compiler will
create in hardware) will allow -4 to 3, while you're requesting -3 to 3. This
might cause some interesting hardware behaviour unless you keep this in mind
when writing your code.


Pieter Hulshoff

Fri, 16 Sep 2005 15:48:54 GMT  
 [ 2 post ] 

 Relevant Pages 

1. Two Dimensional Array!

2. Two dimensional array

3. two dimensional arrays

4. Displaying Data Two Dimensional Array Fields In A List Box

5. achoice with two dimensional arrays

6. Surface integral for two dimensional array

7. Two dimensional array in COBOL (need help)

8. Two (or more) dimensional arrays?

9. two-dimensional array in Verilog

10. Two-dimensional arrays in verilog-are they synthesizable?

11. Two Dimensional Array

12. Two-dimensional array or LPM_MUX


Powered by phpBB® Forum Software