ASIC design Hewlett-Packard Spokane 
Author Message
 ASIC design Hewlett-Packard Spokane

   (Please do not respond to the person posting this message.)

Hewlett-Packard Spokane Division, located in Spokane, Washington, currently
has a number of openings for engineers in R&D and Marketing.  At HP in Spokane,
we're creating the most advanced test instruments and related equipment for
the wireless communications industry.  Our product and technology development
initiatives offer a growing variety of professional challenges.  But more
than that, our Spokane location provides just as much variety for a great
life away from work.

Spokane is a growing community where you'll find a wealth of cultural options
to enrich your life.  In addition, our spectacular natural setting affords
every recreational activity imaginable.

Currently, we have openings for a number of engineers.  To apply, fax
a cover letter and resume to Janice Beyer at (509) 921-4752.  Please
do not respond to the person posting this message.

Candidates must have the legal right to work in the United States; i.e.,
be a U.S. citizen, permanent resident, asylee, refugee or temporary
resident.  In addition, all candidates who receive a job offer from Hewlett-
Packard are required to complete a drug screen as a condition of employment.



Essential Functions (Major Responsibilities):

Responsible for a variety of digital ASIC designs for the next
generation of mobile communications test equipment. Includes partici-
pation in system architecture definition. Primary focus will be CMOS
gate array design and development from requirements definition,
through system integration, and into production. May also include
high speed digital PC board design.


BSEE plus 3 years experience with digital ASIC design, including
experience with design capture, simulation, testability analysis and
development, and silicon verification. Must work well in a team-
oriented product development environment.

Other Duties (Marginal Responsibilities):

Some offsite travel to customer sites may be required.


VHDL experience. Synopsys experience. Mentor Graphics electronics
design automation experience. Prototyping experience with FPGA and
PLD devices.

Mon, 10 Feb 1997 07:56:08 GMT  
 [ 1 post ] 

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