Binary to Seven Segment Display?
Since your binary is only 10 bits, the easiest approach would be to use
a look-up table. You'd need a 1kx7 memory, which can be done with just
2 Block Rams in the virtex architecture, or 4 EABs in Altera 10K.
Another approach would be to use BCD arithmetic instead of binary for
whatever is generating the 10 bit binary (you'd have 12 bit bcd
instead). Either of these are less complex than doing a conversion.
> It will be displayed as a decimal, the max value to display would be
> 999. The spec has no mention of values above this, the real values
> expected are to be in the tens max anyway.
> I been told that the decoder could be quite complicated, I thought
> that there might be a code example on the web somewhere that I just
> haven't been able to find. The board allows for a full Xilinx
> XCR3064XL VQ44 to be used just for the display driver so space
> shouldn't be a problem.
> Does anyone have any suggestions on how to approach the algorithm?
> what about std_logic_vector to Integer, then mod and div functions?
> Are these functions synthesizable in VHDL?
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