IEEE VHDL library support in HDL compilers 
Author Message
 IEEE VHDL library support in HDL compilers

Hey,
    I have a few concerns with regards to support for the IEEE VHDL
libraries in HDL compilers.  I'm currently using Synopsys FPGA Express
v3.3 (that comes with Xilinx Foundation 2.1i), and have found that this
compiler does not support the 'math_real' IEEE library for real (i.e.
floating point) numbers, or the divide "/" function from the
'numeric_std' IEEE library.  I was wondering if anyone knows if current
versions of Synopsys FPGA Compiler II or Synopsys FPGA Express have
support for these libraries?  Does the Xilinx XST Compiler support these
libraries?  What other professional HDL compilers are offered, which
provide this kind of support?  If these libraries aren't yet supported
in any compilers, why is this the case?  Thanks for your time.

Kris Nichols
School of Engineering
University of Guelph
Guelph, Ontario
Canada



Mon, 17 Nov 2003 07:14:51 GMT  
 IEEE VHDL library support in HDL compilers
Kris Nichols a crit :

Quote:

> Hey,
>     I have a few concerns with regards to support for the IEEE VHDL
> libraries in HDL compilers.

Hi Kris,

First of all "compiler" is an ambiguous word. For most software
people and for some hardware it's a tool that converts a source
code (C, C++, Java, VHDL, Verilog, etc) in a binary object code
that is in turn converted in executable form by a linker. So it
leads to simulation. For some hardware guys it means synthesizer:
a tool that interprets the source code and tries to build a logic
gates network that implements the same behavior. There are a lot
of differences between synthesizers and true compilers but one
that is meaningful to you is that compilers usually accept the
whole syntax of while synthesizers can only handle a small subset.

Quote:
> I'm currently using Synopsys FPGA Express
> v3.3 (that comes with Xilinx Foundation 2.1i),

That is, a synthesizer, not a compiler.

Quote:
> and have found that this
> compiler does not support the 'math_real' IEEE library for real (i.e.
> floating point) numbers, or the divide "/" function from the
> 'numeric_std' IEEE library.

Because real stuff is not synthesizable logic synthesizers. Same
with dividers. The reason being that a FPU or a divider are too
large modules with too many different possible hardware
architectures. If you code your real operations at a too high
level of abstraction (S := A * B; S, A and B beeing floats) you
don't give enough informations about the hardware architecture you
want. So, if you really need floating point in your hardware
either use an already designed FPU or design your own (and then
you'll have to deal with sign, exponent and mantissa, left and
right shifts, infinity, not a number, zero+, zero-, etc).

Quote:
> I was wondering if anyone knows if current
> versions of Synopsys FPGA Compiler II or Synopsys FPGA Express have
> support for these libraries?  Does the Xilinx XST Compiler support these
> libraries?  What other professional HDL compilers are offered, which
> provide this kind of support?  If these libraries aren't yet supported
> in any compilers, why is this the case?  Thanks for your time.

Every true compiler supports reals and dividers (and pointers, files,
etc). Their names are Leapfrog, Ncsim, Modelsim, VSS, etc. Not FPGA
Compiler, MAX+II, Quartus, dc_shell, ac_shell, etc. The frequent
confusion (even in this group) comes from post-synthesis simulation
capabilities of some synthesizers. MAX+II, for instance, lets you
define waveform stimulus, simulate your design and analyze the
resulting waveforms. But first of all it synthesizes your source
code because it's not a true compiler-linker-simulator, it's what we
call a gate-level simulator, all it can "simulate" is a network of
gates, a netlist. So it cannot simulate reals and dividers while
Ncsim from Cadence can. Hope it helps.

Regards,
--
Renaud Pacalet, ENST / COMELEC, 46 rue Barrault 75634 Paris Cedex 13



Mon, 17 Nov 2003 15:10:51 GMT  
 IEEE VHDL library support in HDL compilers
Thanks Renaud, you confirmed my suspicions.  I apoligize for my use of
'compiler', when I meant 'synthesizer'.  As you've probably guessed by now, I
come from a software background.

Kris N.

Quote:

> Kris Nichols a crit :

> > Hey,
> >     I have a few concerns with regards to support for the IEEE VHDL
> > libraries in HDL compilers.

> Hi Kris,

> First of all "compiler" is an ambiguous word. For most software
> people and for some hardware it's a tool that converts a source
> code (C, C++, Java, VHDL, Verilog, etc) in a binary object code
> that is in turn converted in executable form by a linker. So it
> leads to simulation. For some hardware guys it means synthesizer:
> a tool that interprets the source code and tries to build a logic
> gates network that implements the same behavior. There are a lot
> of differences between synthesizers and true compilers but one
> that is meaningful to you is that compilers usually accept the
> whole syntax of while synthesizers can only handle a small subset.

> > I'm currently using Synopsys FPGA Express
> > v3.3 (that comes with Xilinx Foundation 2.1i),

> That is, a synthesizer, not a compiler.

> > and have found that this
> > compiler does not support the 'math_real' IEEE library for real (i.e.
> > floating point) numbers, or the divide "/" function from the
> > 'numeric_std' IEEE library.

> Because real stuff is not synthesizable logic synthesizers. Same
> with dividers. The reason being that a FPU or a divider are too
> large modules with too many different possible hardware
> architectures. If you code your real operations at a too high
> level of abstraction (S := A * B; S, A and B beeing floats) you
> don't give enough informations about the hardware architecture you
> want. So, if you really need floating point in your hardware
> either use an already designed FPU or design your own (and then
> you'll have to deal with sign, exponent and mantissa, left and
> right shifts, infinity, not a number, zero+, zero-, etc).

> > I was wondering if anyone knows if current
> > versions of Synopsys FPGA Compiler II or Synopsys FPGA Express have
> > support for these libraries?  Does the Xilinx XST Compiler support these
> > libraries?  What other professional HDL compilers are offered, which
> > provide this kind of support?  If these libraries aren't yet supported
> > in any compilers, why is this the case?  Thanks for your time.

> Every true compiler supports reals and dividers (and pointers, files,
> etc). Their names are Leapfrog, Ncsim, Modelsim, VSS, etc. Not FPGA
> Compiler, MAX+II, Quartus, dc_shell, ac_shell, etc. The frequent
> confusion (even in this group) comes from post-synthesis simulation
> capabilities of some synthesizers. MAX+II, for instance, lets you
> define waveform stimulus, simulate your design and analyze the
> resulting waveforms. But first of all it synthesizes your source
> code because it's not a true compiler-linker-simulator, it's what we
> call a gate-level simulator, all it can "simulate" is a network of
> gates, a netlist. So it cannot simulate reals and dividers while
> Ncsim from Cadence can. Hope it helps.

> Regards,
> --
> Renaud Pacalet, ENST / COMELEC, 46 rue Barrault 75634 Paris Cedex 13




Mon, 17 Nov 2003 20:22:27 GMT  
 
 [ 3 post ] 

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