Time Delay in signal assignment 
Author Message
 Time Delay in signal assignment

Hi,

    I am a newbie in VHDL programming.  Can someone explain to me why and
where we would use time delay in our design?

Joseph



Thu, 02 Oct 2003 12:25:20 GMT  
 Time Delay in signal assignment
Hi, Joseph.

You wouldn't normally use time delay in a design that is to target
real hardware.  In fcat, I don't know of any synthesizers that will
support it.  But you do use it for your simulations, and your
simulation models.  

For example, if you are modelling an SSRAM who's Tpd is 5.4ns,
you could write

  DataPin <= DataArray(Address) after Tpd;

HTH,
-Kent

Quote:

>     I am a newbie in VHDL programming.  Can someone explain to me why and
> where we would use time delay in our design?

> Joseph



Fri, 03 Oct 2003 09:55:48 GMT  
 Time Delay in signal assignment
So Kent,

In your model (and modelling in general), is it best to use transport or
inertial delay?

Barry Brown

Quote:

>Hi, Joseph.

>You wouldn't normally use time delay in a design that is to target
>real hardware.  In fcat, I don't know of any synthesizers that will
>support it.  But you do use it for your simulations, and your
>simulation models.

>For example, if you are modelling an SSRAM who's Tpd is 5.4ns,
>you could write

>  DataPin <= DataArray(Address) after Tpd;

>HTH,
>-Kent


>>     I am a newbie in VHDL programming.  Can someone explain to me why and
>> where we would use time delay in our design?

>> Joseph



Fri, 03 Oct 2003 23:36:13 GMT  
 Time Delay in signal assignment

Quote:

> So Kent,

> In your model (and modelling in general), is it best to use transport or
> inertial delay?

> Barry Brown

Hi Barry.

I tend to stick with simple 'after' statements.  Most of what I do is
targetted at hardware, and I don't get very deep into timing-accurate
modelling for my testbanches.  I can get by with checking my worst case
setup & hold time, usually.

HTH,
-Kent



Sat, 04 Oct 2003 21:08:53 GMT  
 
 [ 4 post ] 

 Relevant Pages 

1. $setuphold, delayed signals, and no timing checks?

2. Sync a signal to another signal or delay it for one rising edge

3. Please give me an example of intr-assignment delays to overcome problems of clock skew

4. Pound delays in non-blocking assignments

5. question about delay/event-controlled assignments

6. Measure the phase delay of 2 15Khz analog signals

7. waveform signal delay

8. waveform signal delay

9. how to impose a delay on signal?

10. Delays on Bidirectional Signals

11. how to get delayed signal

12. Signals and delays

 

 
Powered by phpBB® Forum Software