Data transport issue from 20MHz to 10MHz clk domain 
Author Message
 Data transport issue from 20MHz to 10MHz clk domain

Hi,

I have a 14-bit data that needs to be transferred from one sync. clk
domain to another without loosing any bits.
One idea is to make the data twice as long to allow the slow clock to
register all incoming data.
However, I don't know how you make the data pulse longer (slower)?

Please help!

Best regards,
Taro



Mon, 09 Aug 2004 11:39:20 GMT  
 Data transport issue from 20MHz to 10MHz clk domain
What's a "data pulse" ?

If you're transferring data from a 20MHz domain to a 10MHz domain, you
either need data that is supplied at most every other clock cycle at
20MHz or you'll need to transfer two 14 bit values every 10MHz clock
cycle.

Are the two clocks fixed in a phase relationship to each other or are
they "about 20MHz" and "about 10MHz" resulting in data synchronization
issues?  (Occasionally 3 20MHz data values per 10MHz clock)

- John_H

Quote:

> Hi,

> I have a 14-bit data that needs to be transferred from one sync. clk
> domain to another without loosing any bits.
> One idea is to make the data twice as long to allow the slow clock to
> register all incoming data.
> However, I don't know how you make the data pulse longer (slower)?

> Please help!

> Best regards,
> Taro



Tue, 10 Aug 2004 01:40:56 GMT  
 
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