ncverilog and Linux 
Author Message
 ncverilog and Linux

Hi,
Having problems with ncverilog on Linux. The compilation works fine but
the elaboration fail. See the output below. I am using version 3.2.
Verilog works fine, the same version!
Of course, I have tried several testbenches and they reach the same
point. Using the same version on Solaris 5.7 works OK.

All input are appreseated.
--
Jihad Daoud

------------8<------------------ The output
[ulinpc64] ~/verilog-xl/group2/lab5-alu/ $ ncverilog alu_test.v alu.v
ncverilog: v03.20.(p001): (c) Copyright 1995 - 2000 Cadence Design
Systems, Inc.
file: alu_test.v
        module worklib.alu_test:v
                errors: 0, warnings: 0
file: alu.v
        module worklib.alu:v
                errors: 0, warnings: 0
ncelab: *internal* (bl_read_str_table - no start marker).
ncverilog: *E,ELBERR: Error during elaboration (status 1), exiting.
[ulinpc64] ~/verilog-xl/group2/lab5-alu/ $
------------8<--------------------



Wed, 17 Sep 2003 01:14:33 GMT  
 ncverilog and Linux


Quote:
> Hi,
> Having problems with ncverilog on Linux. The compilation works fine but
> the elaboration fail. See the output below. I am using version 3.2.
> Verilog works fine, the same version!
> Of course, I have tried several testbenches and they reach the same
> point. Using the same version on Solaris 5.7 works OK.

> All input are appreseated.
> --
> Jihad Daoud
> ncelab: *internal* (bl_read_str_table - no start marker).
> ncverilog: *E,ELBERR: Error during elaboration (status 1), exiting.
> [ulinpc64] ~/verilog-xl/group2/lab5-alu/ $
> ------------8<--------------------

Hi,  You can find the latest information by looking on
http://sourcelink.cadence.com You'll need to enter your site ID to register.
I just did a search on all topics under ncverilog and theres a known Linux
problem that has a similar error generated to yours.

Here is the response;

*Error_Message:

ncelab: *internal* (bl_read_str_table - no start marker).

*Problem:

I have a design that works fine on Solaris. When I run the simulation on
Linux
platform NC- Verilog crashes and I get the above mentioned errors.

Running in ncverilog single verb command ( or ncxlmode) on RedHat
Linux 7.0 and I receive the above error message.  This does not happen
in the 3-step process of invocation using ncvlog, ncelab and ncsim in
separate steps.

----------------------------------------------------------------------------
----

*Solution:

1 You may get this error if you are using RedHat 6.2 or higher (Kernel
2.2.14 or
higher). Try to use the design on RedHat 6.1 which is the officially
supported
version of linux (Kernel 2.2.12)

2 There is a bug in Linux 7.0 that has a fix on the RedHat support
pages.  Use the following URL to locate the patch rpm file needed
to make ncverilog functional  again.

http://www.redhat.com/support/errata/RHBA-2000-079-04.html

Follow the instructions on this page to obtain this patch. Version 2.2
of this patch is available beginning December 2000.



Fri, 19 Sep 2003 23:24:39 GMT  
 ncverilog and Linux
I was told by my IS dept. that NC Verilog works under Redhat 6.2, not 7.0.

This could be your problem perhaps.


Quote:



> > Hi,
> > Having problems with ncverilog on Linux. The compilation works fine but
> > the elaboration fail. See the output below. I am using version 3.2.
> > Verilog works fine, the same version!
> > Of course, I have tried several testbenches and they reach the same
> > point. Using the same version on Solaris 5.7 works OK.

> > All input are appreseated.
> > --
> > Jihad Daoud

> > ncelab: *internal* (bl_read_str_table - no start marker).
> > ncverilog: *E,ELBERR: Error during elaboration (status 1), exiting.
> > [ulinpc64] ~/verilog-xl/group2/lab5-alu/ $
> > ------------8<--------------------

> Hi,  You can find the latest information by looking on
> http://sourcelink.cadence.com You'll need to enter your site ID to
register.
> I just did a search on all topics under ncverilog and theres a known Linux
> problem that has a similar error generated to yours.

> Here is the response;

> *Error_Message:

> ncelab: *internal* (bl_read_str_table - no start marker).

> *Problem:

> I have a design that works fine on Solaris. When I run the simulation on
> Linux
> platform NC- Verilog crashes and I get the above mentioned errors.

> Running in ncverilog single verb command ( or ncxlmode) on RedHat
> Linux 7.0 and I receive the above error message.  This does not happen
> in the 3-step process of invocation using ncvlog, ncelab and ncsim in
> separate steps.

> --------------------------------------------------------------------------
--
> ----

> *Solution:

> 1 You may get this error if you are using RedHat 6.2 or higher (Kernel
> 2.2.14 or
> higher). Try to use the design on RedHat 6.1 which is the officially
> supported
> version of linux (Kernel 2.2.12)

> 2 There is a bug in Linux 7.0 that has a fix on the RedHat support
> pages.  Use the following URL to locate the patch rpm file needed
> to make ncverilog functional  again.

> http://www.redhat.com/support/errata/RHBA-2000-079-04.html

> Follow the instructions on this page to obtain this patch. Version 2.2
> of this patch is available beginning December 2000.



Sat, 20 Sep 2003 09:55:04 GMT  
 ncverilog and Linux

Quote:
> I was told by my IS dept. that NC Verilog works under Redhat 6.2, not 7.0.

For NC Sim 3.2 release, Redhat 6.1 is officially supported by Cadence. Some
testing is done on 6.2 and 7.0  boxes already, but you won't be able to get
maintenance on 6.2, 7.0. However in this messsage example, the hotline was
able to suggest downloading the patch from Redhat that fixed the problem.

For NC Sim 3.3 release(July 2001) we are targeting to have official Redhat
7.0 support for maintenance.

--
Martyn Pollard

NC-Sim - High Performance VHDL/Verilog Simulation
NC-VHDL, NC-Verilog, NC-Cov(code coverage), HAL(Lint)
Cadence Design Systems.



Mon, 22 Sep 2003 04:00:00 GMT  
 ncverilog and Linux
Hi,
Thank you all for your inputs.
It worked fine when we updated glibc.
--
Jihad Daoud


Mon, 22 Sep 2003 17:55:46 GMT  
 ncverilog and Linux
I'm still waiting for an ncelab that works....


Quote:


> > I was told by my IS dept. that NC Verilog works under Redhat 6.2, not
7.0.

> For NC Sim 3.2 release, Redhat 6.1 is officially supported by Cadence.
Some
> testing is done on 6.2 and 7.0  boxes already, but you won't be able to
get
> maintenance on 6.2, 7.0. However in this messsage example, the hotline was
> able to suggest downloading the patch from Redhat that fixed the problem.

> For NC Sim 3.3 release(July 2001) we are targeting to have official Redhat
> 7.0 support for maintenance.

> --
> Martyn Pollard

> NC-Sim - High Performance VHDL/Verilog Simulation
> NC-VHDL, NC-Verilog, NC-Cov(code coverage), HAL(Lint)
> Cadence Design Systems.



Tue, 23 Sep 2003 11:41:06 GMT  
 
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