Verilog Training Available 
Author Message
 Verilog Training Available


Verilog holds the promise of shorter design times and increased
productivity.  To unlock that potential, a designer needs to learn not
just the language but how to apply the language to meet their design
goals.  The best instructors offer the unique combination of design
experience, consulting experience, and teaching experience.

No Substitute for Experience

It's one thing to learn a hardware description language, it's another to
understand how to apply the language to real world design issues.  TM
Associates markets training courses developed and delivered by industry
leading HDL consultants.  Our company provides you with a single source
for the best HDL training classes.  Each instructor has extensive teaching
and design/consulting  experience.  They have worked with numerous design
teams to help them fully realize the benefits of a hardware description

Subject Matter Experts

The instructors are independent consultants who are actively involved in
HDL consulting and are recognized as industry leaders.  They bring to the
classroom a practical and in-depth knowledge of HDL design gained from
years of consulting experience and from serving on the boards that define
the Verilog and VHDL standards.  Each instructor has developed their own
course material which reflects that knowledge.  Each course is kept
up-to-date with the latest changes to the language.    

Training is our specialty, not a sideline.

Because TM Associates is independent and markets training from leading
consultants, the instructors are not tied to any EDA product line.  They
have an objective viewpoint and can offer advice on a variety of EDA tools
based on their own experience.  The objective of the training is to make
your people productive in your unique design environment, not to promote
software sales.

Customization to Meet Your Needs

Companies' needs are not the same.  Perhaps some aspect of the language
needs to be emphasized or a specific design issue needs to be addressed.
Or, perhaps the capabilities of a certain EDA tool need to be discussed.
The courses can be customized to meet your needs.  From subject matter to
delivery format we will be glad to discuss your specific requirements to
maximize the effectiveness of the course.

Current Classes

(A detailed agenda is available for each class.  All classes have labs
that reinforce the concepts.  Additional information is available on each

Comprehensive Verilog HDL Training (4 days)
by Stuart Sutherland of Sutherland HDL Consulting
An intensive course on the Verilog hardware description language.  All
aspects of behavioral, RTL, and gate level modeling are presented.  The
course enables the student to be productive with Verilog and Verilog
software tools.  A quick reference guide is included with the
comprehensive student guide.  Mr. Sutherland has 12 years of design,
teaching and consulting experience.  Mr. Sutherland is involved in the
IEEE Verilog Standardization Committee and the OVI Logic Modeling and
Timing Subcommittee.

Advanced Verilog PLI Training (3 days)
by Stuart Sutherland of Sutherland HDL Consulting
The class covers all aspects of the Program Language Interface (PLI).
Topics include test vector readers, design debug utilities, power analysis
and C models.  The course is taught by Stuart Sutherland.  Mr. Sutherland
has been the technical editor for the PLI sections of the IEEE 1364
Verilog Language Reference Manual.  Further highlights of Mr. Sutherland's
experience are given in the description of the previous course.

Comprehensive Verilog HDL Synthesis Training (3 days)
by Cliff Cummings of Sunburst Design
A class for engineers with a working knowledge of Verilog HDL who need to
understand Verilog HDL synthesis coding styles as supported by major
synthesis tools.  The class is taught by Cliff Cummings who has 14 years
of design, teaching and consulting experience.  Mr. Cummings has in-depth
knowledge of the Cadence, Synopsys, Chronologic, and Mentor Graphics tool
sets and serves on the IEEE 1364 Verilog Standardization Committee.

VHDL: A Practical Introduction (4 days)
By Paul Menchini of Menchini and Associates
A class in which students become familiar with all of VHDL's design units,
declarations, specifications, and statements, and will understand how they
work together to describe the structure, data flow, and behavior of a
digital system.  Mr. Menchini has been involved with VHDL since its
inception and has 19 years of design, teaching and consulting experience.
Mr. Menchini wrote the Designing with VHDL textbook and has taught VHDL to
over 4,000 people.  He edited the 1993 Language Reference Manual and is
the Chair of the DASC, which oversees all the IEEE'S standardization
efforts related to VHDL.

Consulting Available

If you have special needs that are not met by a standard class or even a
customized class, consulting is available.  Consulting can offer the best
solution for the toughest design problems and the tightest schedules.

More Information

For more information contact:
Tom Wille
TM Associates

Fri, 06 Aug 1999 03:00:00 GMT  
 [ 1 post ] 

 Relevant Pages 

1. Verilog Training Available

2. Verilog Training Available

3. Verilog Training Available

4. Verilog Training Available

5. Verilog Training Available

6. Verilog Training Available

7. Verilog Training Available

8. Verilog Training Available

9. Verilog Training Available

10. Verilog Training Available

11. Verilog Training Available

12. Verilog Training Available


Powered by phpBB® Forum Software