VHDL & Verilog Co-Simulation in VCS 
Author Message
 VHDL & Verilog Co-Simulation in VCS

Hi All,
      I have a huge design to verify, part of which is in VHDL and the
rest in Verilog. We have seen that VCS (Synopsys) is MUCH faster than
ModelSim (about 10x), so we would prefer to use VCS for the whole
design. The problem is how to handle VHDL models with VCS? We don't
have currently VSS.

  Given this, I thought of a solution as follows:

1.> VCS can integrate SWIFT models and simulate.
2.> Also Synopsys provides a VHDL Model Compiler which converts VHDL to
SWIFT models.

So how about converting VHDL models to SWIFT models and use them with
VCS?

  Now, my questions are:

1.> Will this flow work?
2.> Do you have expereince with SWIFT models (creation and/or
integration) tha you could kindly share with me?

3.> What is the overhead of using SWIFT models with VCS?

4.> Any other solutions to my problem?

TIA for any advice.

Kind Regards,
Srini

--
Srinivasan Venkataramanan
ASIC Design Engineer
Chennai, India

Sent via Deja.com
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Sun, 15 Jun 2003 15:11:36 GMT  
 VHDL & Verilog Co-Simulation in VCS

Quote:
> Hi All,
>       I have a huge design to verify, part of which is in VHDL and the
> rest in Verilog. We have seen that VCS (Synopsys) is MUCH faster than
> ModelSim (about 10x), so we would prefer to use VCS for the whole
> design. The problem is how to handle VHDL models with VCS? We don't
> have currently VSS.
> 4.> Any other solutions to my problem?

Use NC-Sim! Our customers tell us its the fastest simulator available on the
market for any VHDL/Verilog co-simulation projects. You can also buy it
separately as NC-VHDL or NC-Verilog for just single language simulation.

Go to www.cadence.com -> EDA Solutions.  You should find a link on there
with details of your local sales office. They can arrange to send you an
evaluation copy of the simulator.

Martyn

--
Martyn Pollard, Cadence Design Systems

NC-Sim - High Performance VHDL and Verilog Simulator.
On HP, Sun, Linux, NT and Win98



Mon, 16 Jun 2003 04:24:48 GMT  
 VHDL & Verilog Co-Simulation in VCS
Martyn,
     Without my having to contact a Cadence salesperson, how much is a one
year NC-Sim license/seat for VHDL/Verilog cosimulation on an NT machine?
You may reply by personal email if you so desire.
     Thanks.
Simon Ramirez, Consultant
Synchronous Design, Inc.
Oviedo, FL  USA


Quote:


> > Hi All,
> >       I have a huge design to verify, part of which is in VHDL and the
> > rest in Verilog. We have seen that VCS (Synopsys) is MUCH faster than
> > ModelSim (about 10x), so we would prefer to use VCS for the whole
> > design. The problem is how to handle VHDL models with VCS? We don't
> > have currently VSS.

> > 4.> Any other solutions to my problem?
> Use NC-Sim! Our customers tell us its the fastest simulator available on
the
> market for any VHDL/Verilog co-simulation projects. You can also buy it
> separately as NC-VHDL or NC-Verilog for just single language simulation.

> Go to www.cadence.com -> EDA Solutions.  You should find a link on there
> with details of your local sales office. They can arrange to send you an
> evaluation copy of the simulator.

> Martyn

> --
> Martyn Pollard, Cadence Design Systems

> NC-Sim - High Performance VHDL and Verilog Simulator.
> On HP, Sun, Linux, NT and Win98



Mon, 16 Jun 2003 09:10:31 GMT  
 VHDL & Verilog Co-Simulation in VCS
Hi Martyn,

Quote:



> > Hi All,

<SNIP>

Quote:

> > 4.> Any other solutions to my problem?
> Use NC-Sim! Our customers tell us its the fastest simulator available on the
> market for any VHDL/Verilog co-simulation projects. You can also buy it

  Well I was one of the very first persons to evaluate this NC tool
set (Mid of 1998, involved in Beta testing at Philips, Netherlands). I
know it is MUCH faster than Leapfrog-Verilog-XL but didn't compare it
against other tools.

As of now we are not in a position to take up a new tool (:-

Anyway Thanks for the response.

Regards,
Srini

--
Srinivasan Venkataramanan (Srini)
ASIC Design Engineer,
Chennai (Madras), India



Mon, 16 Jun 2003 12:22:25 GMT  
 
 [ 4 post ] 

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