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                1996 INTERNATIONAL VERILOG HDL CONFERENCE

                           February 26 - 28, 1996

                   ********* CALL FOR PAPERS *********

Sponsored by: Open Verilog Int'l and IEEE Computer Society
In cooperation with:  Electronics Industries Association, Japan

                             IMPORTANT DATES

             Manuscripts and Proposals Due:  OCTOBER 2, 1995

             Notification of Acceptance:     NOVEMBER 20, 1995

             Final Manuscripts due:          DECEMBER 18, 1995

The 1996 International Verilog HDL Conference will be held at the Santa
Clara Convention Center in Santa Clara, California on February 26 - 28. The
1996 Conference, provides a forum for publishing Verilog HDL related
information and disseminating expertise about top-down design
methodologies.  During the IVC conference, the HDL user community, EDA and
ASIC companies, and university researchers have an opportunity to play an
active role in determining the future direction of Verilog HDL, interact
with each other, and exchange information.

The IVC has instituted the following award: (Best Paper         $750.00)
All industry and academia papers are eligible for the best paper awards.

Ten copies of full manuscripts of papers or proposals for panels,
workshops, tutorials and presentations should be submitted before OCTOBER
2, 1995 to the following address:

                Mike Baird
                Program Chair, Int'l Verilog HDL Conference

                tel:   (303) 530-4562
                fax:   (303) 530-4334

The page limit is 8 pages.  Participants will be notified of acceptance by
November 20, 1995.

For information concerning the conference contact:

                Lee Wood
                c/o MP Associates, Inc.
                5305 Spine Rd., Ste. A
                Boulder, CO  80301

                tel:   (303) 530-4562
                fax:   (303) 530-4334

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