Extremely high rates ($$$) in Orlando for VHDL, VERILOG, SYNOPSIS, ASIC DEVELOPMENT 
Author Message
 Extremely high rates ($$$) in Orlando for VHDL, VERILOG, SYNOPSIS, ASIC DEVELOPMENT

TECHNISOURCE
JOB TITLE          : VHDL, VERILOG, SYNOPSIS, ASIC DEVELOPMENT
Environments
JOB LOCATION: Orlando

    For a continuously updated list of opportunities please visit
    our Web Page...       http://www.*-*-*.com/
*************************************************************************

 TECHNISOURCE has the following opportunity out of its ORLANDO office.

 TECHNISOURCE REQUIREMENT NUMBER FOR REFERENCE: VHDL001

 JOB DESCRIPTION: Please reference requirement # with response.
 ------------------------------
 ASIC DEVELOPMENT USING VHDL, VERILOG, SYNOPSIS, ARITHMETIC PIPELINE

 REQUIRED SKILLS:
 -----------------------------
 ASIC DEVELOPMENT USING VHDL, VERILOG, SYNOPSIS, ARITHMETIC PIPELINE

Technisource, one of the fastest growing and most respected suppliers of
Technical expertise to the nation has opportunities both locally and
nationwide.  TechniSource has positions open for both consultants and
members
of our Technical Staff.

Please Reply To:   Chris Giles

Technisource, Inc.
Dept. - 3813
3260 University Blvd
Suite 185
Winter Park, FL 32792
Phone (800)940-9401 Fax (407)677-8525

WWW:   http://www.*-*-*.com/

* WHEN FAXING PLEASE USE THE HIGHEST RESOLUTION AVAILABLE (We Use OCR).*

*************************************************************************
    For a continuously updated list of opportunities please visit
    our Web Page...       http://www.*-*-*.com/
*************************************************************************
____



Tue, 27 Oct 1998 03:00:00 GMT  
 
 [ 1 post ] 

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