use of compiler directive 'signed 
Author Message
 use of compiler directive 'signed

Hi,

How should I use the compiler directive `signed
I've tried several things but it keeps generating an error with
compilation. I can't find examples in literature.

Thanks,
Menno



Sat, 02 Feb 2002 03:00:00 GMT  
 use of compiler directive 'signed


Quote:
> Hi,

> How should I use the compiler directive `signed
> I've tried several things but it keeps generating an error with
> compilation. I can't find examples in literature.

> Thanks,
> Menno

   Unless I am mistaken, `signed does not look
   like a standard (IEEE 1364-1995) compiler directive.

   It may be a custom compiler directive that a specific
   simulator supports or it could be a macro pre-processed
   by m4 etc. before the simulator is invoked.

   Regards,
   - Swapnajit.

--
=-=-= 100% pure Verilog PLI - go, get it ! =-=-=
 Principles of Verilog PLI -By- Swapnajit Mittra
 Kluwer Academic Publishers. ISBN: 0-7923-8477-6
 http://www.angelfire.com/ca/verilog/

Sent via Deja.com http://www.deja.com/
Share what you know. Learn what you don't.



Sun, 03 Feb 2002 03:00:00 GMT  
 use of compiler directive 'signed
Look at page C-11 of the Verilog Hardware Description Language Reference
Manual (LRM), Version 2.0 published March 1993 by Open Verilog
International.

My question is related to the fact that Synopsys Design Compiler (logic
synthesizer) treats integers as unsigned while the Verilog Language
states that integers are 32 bit 2's complement values.

Regards,
Menno

Quote:



> > Hi,

> > How should I use the compiler directive `signed
> > I've tried several things but it keeps generating an error with
> > compilation. I can't find examples in literature.

> > Thanks,
> > Menno

>    Unless I am mistaken, `signed does not look
>    like a standard (IEEE 1364-1995) compiler directive.

>    It may be a custom compiler directive that a specific
>    simulator supports or it could be a macro pre-processed
>    by m4 etc. before the simulator is invoked.

>    Regards,
>    - Swapnajit.

> --
> =-=-= 100% pure Verilog PLI - go, get it ! =-=-=
>  Principles of Verilog PLI -By- Swapnajit Mittra
>  Kluwer Academic Publishers. ISBN: 0-7923-8477-6
>  http://www.angelfire.com/ca/verilog/

> Sent via Deja.com http://www.deja.com/
> Share what you know. Learn what you don't.



Mon, 04 Feb 2002 03:00:00 GMT  
 
 [ 3 post ] 

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