Verilog integer divider .. 
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 Verilog integer divider ..

Dividend : 32 bit
Divisor : 32 bit.
Both are integer.

What do you think it's better to implement :
- succesive subtraction
- subtraction with restore
- compare and sub
??
I'm trying to implement the one with restore (I think it's faster) but I
found some problem in the algorithm.
Can anyone post me how the algorithm *really* works ? ( or the verilog !)
Thanks !



Wed, 05 Nov 2003 21:12:23 GMT  
 
 [ 1 post ] 

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