IVAN inplementation in IDL 
Author Message
 IVAN inplementation in IDL

Hello.  I posted this to comp.lang.idl several weeks ago but
haven't received any replies.  I am afraid no one reads that
group any more.  I will try here.

I am looking for any information on IVAN which is the
internal representation of VHDL (VHSIC Hardware Description
Language).  I think most of you are aqquainted with VHDL and
IVAN.  However, in case you are not, let me briefly explain
what they are.

VHDL is a hardware description language and now it is IEEE
standard language for hardware design.  Since DoD triggered
and supports its research activities, it's very similar to
Ada's situation. IVAN, in turn, is akin to Diana.

I've read a paper entitled "IDL: Background and Status"
written by D.L.Stone and J.R.Nestor, published on SIGPLAN
Notices Vol.22 No.II Nov. '87. In the paper, I found one
reference to the paper for VHDL Designer's Environment. The
referenced paper's title is "VHDL-the Designer Environment",
published in IEEE Design & Test '86. In that paper they say
they plan to use IDL to implement IVAN, which they suggest
is the VHDL equivalent of Diana.

I have no friends in Japan who are familiar with either VHDL
or IVAN, so of course they know nothing about the IDL
version of IVAN.  I'm interested in the development of VHDL
analyzer, and really would like to know more about IVAN and
this IDL implementation.

If you have any knowledge on what I'm asking, or sources
that would be useful, please let me know by e-mail.


I am at:        (if you are outside Japan)

Or              (for within Japan)

Thank you much in advance.

Sun, 02 May 1993 12:18:16 GMT  
 [ 1 post ] 

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