Flip Flops and edge detectors

Quote:

>Subject: Flip Flops and edge detectors

>Date: 25 Feb 1997 23:28:07 GMT

>I have wondered for a while if Y'all have some favorite ways to do edge

>detection equivalent to a flip flop with an associated state variable. I

>need this all the time in industrial control and have never really like

>the easily confused methods I have used. I am looking for something --

>well -- better, or consistent and understandable for other readers of my

>code.

>Along the same line, I would like to see versions of the standard

>flip-flops like J/K, R-S, and D. I can make rather nice ones with objects

>in MOPS or Win32Forth, but how about regular old Forth?

>Charlie Springer

As you probably realize, this is not a trivial question. Several more or less

arbitrary decisions must be made. The biggest assumption needed is how you

will treat time dependent functions. Edge detection is by definition time dependent.

The simplest way is to "remember" the last state and not worry about emulating

variable time conciderations.

Another issue that comes up when you talk about syncronous functions like

flip-flops is how you emulate the clock. The simplest way is to assume that you

only call the function at the sync time (usually the leading edge of the clock).

Then you don't need to worry about edge detection, it is assumed. Another way

to handle this is to have a central clock which is controlled external to the other

logic funtions.

When you talk about storage devices like flip-flops, you also need to decide

if you will need multiple instances of a given type. If so, either the previous state

or its address must be passed to the function. For simplicity in the code below

I have assumed reuse is not needed.

Anyway, below is a quick set of basic logic I put together in Pygmy. most of it

should work with ANS Forth but I didn't take the time to find, install and test an

appropriate ANS system. ( any suggestions of a version as simple as Pygmy?)

--- L. Greg Lisle, PE

----------------------------------------------------------------

( NAND Logic Simulators 26Feb97LGL)

-1 CONSTANT T ( flag definitions)

0 CONSTANT F

: NAND ( a b - /a*b) AND NOT ;

: NOR ( a b - /a+b) OR NOT ;

: XNOR ( a b - o) XOR NOT ;

: AOI ( a b c d -o) AND ROT ROT AND NOR ;

: +EDGE? ( c c'- f) 0= AND ; ( c is current state)

: -EDGE? ( c c'- f) SWAP 0= AND ; ( c' is previous state)

----------------------------------------------------------------

( D_FF 25Feb97LGL)

( : N! ( n a-n} OVER SWAP ! ; )

VARIABLE RS-STATE ( Async with Reset {*filter*})

VARIABLE CLOCK 0 , ( 2VARIABLE CLOCK)

: TCLK CLK? DUP 0= SWAP CLOCK 2! ;

VARIABLE D-STATE

----------------------------------------------------------------

( JK_FF 26Feb97LGL)

VARIABLE JK-STATE

IF 0= TUCK OR ROT ROT NAND NAND

JK-STATE N!

ELSE NIP NIP THEN ;

: FF JK_FF . ;

VARIABLE LATCH-STATE ( Level sensing D-FF)

: LATCH ( d-o) CLK? IF LATCH-STATE N!

---- L. Greg Lisle, PE Forth Toolsmith & Industrial Automation Consultant