Is it ok to POST by just setting an ECB to x'40' ? 
Author Message
 Is it ok to POST by just setting an ECB to x'40' ?

Hi Folks,

I'm working on an SVC hook where I want to do minimal processing, yet I
need to post an ECB.  I tried just poking x'40' in the target ECB, and
sure enough, the waiting task wakes up and gets to work.  Can anyone
tell me if this simple method will cause problems somewhere?  Or should
I get the book out and learn how a branch-entry POST works?

Thanks,
Tom Brennan



Sat, 14 Jul 2001 03:00:00 GMT  
 Is it ok to POST by just setting an ECB to x'40' ?

Tom Brennan wrote

Quote:
>I'm working on an SVC hook where I want to do minimal processing, yet I
>need to post an ECB.  I tried just poking x'40' in the target ECB, and
>sure enough, the waiting task wakes up and gets to work.  Can anyone
>tell me if this simple method will cause problems somewhere?  Or should
>I get the book out and learn how a branch-entry POST works?

Reach for the book. The "method" you describe will not work unless (a) the
waiter has not yet issued wait or (b) the svc you are intercepting is wait -
and even then, it will be hit and miss.

Chris



Sun, 15 Jul 2001 03:00:00 GMT  
 Is it ok to POST by just setting an ECB to x'40' ?
I'm pretty sure that there's an example that shows how to do this in the
back of Principles of Operation.  One of the appendices consists of examples
of use of the various instructions, and one of the examples that they
provide for COMPARE AND SWAP is the "fast-path POST".

Of course, this depends on knowledge of the internal workings of ECBs, which
is generally not the sort of stuff that you want hard-coded in your program.
Caveat Programmor!
--

      IBM Research, Yorktown Heights



Sun, 15 Jul 2001 03:00:00 GMT  
 Is it ok to POST by just setting an ECB to x'40' ?
Thanks everyone for the advice, and also to William Becker who said
about the same thing via e-mail.  Sounds like my trial method shouldn't
work at all - but there it is chugging away on our test system with no
apparent problems.  Based on the fact that CS was mentioned, it could be
this is working simply because our test system runs on a single
processor with little workload.  

Time to get the book out!  

Tom



Sun, 15 Jul 2001 03:00:00 GMT  
 Is it ok to POST by just setting an ECB to x'40' ?

Quote:

>> Sounds like my trial method shouldn't
>> work at all - but there it is chugging away on our test system with >> no apparent problems.

Well, it really wasn't working.  You all were right... :)
William Becker at EMC guessed (even without seeing my code) that my
waiting task wakes up periodically for another reason (a STIMER in this
case) and checks the multiple ECB list to see who posted him.  The first
one he checks is the alleged post from my MVI ECB,X'40', which was set.
So my logic *appeared* to be posted from the MVI when in fact it was
always just waking up from the timer.

So I tried a branch entry, which seems easy since the SVC I'm hooking
already has the LOCAL lock from FLIH:

          LA    R8,LDMECB               POINT TO ECB                
          POST  (8),LINKAGE=BRANCH      POST IT

But that just ended up getting an abend 202 RC=0 in the SVC hook.  Since
the waiting task is in another address space, that abend led me to try
the following:

          LA    R8,LDMECB               POINT TO ECB                
          L     R9,LDMASCB              POINT TO WAITING TASK ASCB      
          POST  (8),LINKAGE=BRANCH,ASCB=(9),ERRET=NOPOSTN,MEMREL=YES  

And that last attempt seems to work just fine.  I increased the STIMER
wait time so it wouldn't interfere, and I'm seeing posts properly now.

What this means to me, is that my guesses at how WAIT/POST processing
works were way off.  I was ass-uming that a WAIT told the dispatcher to
check the *actual* ECB bits every time it gets around to seeing if the
waiting TCB has any work to do.  Apparently that's not the case.  From
this exercise it looks like POST must set or clear some other bit (I
assume one of those TCB wait bits) which actually triggers the
dispatcher to reload my regs and PSW and get wake up the task.  

I'm sure if I had been more clear about what I was doing with these 2
different address spaces you all would have told me this right away, but
I was assuming as long as the ECB was in common storage, that was all
that needed to be shared between the 2 address spaces.  

Thanks for the help,
Tom Brennan
Southern California Edison Co.



Sun, 15 Jul 2001 03:00:00 GMT  
 Is it ok to POST by just setting an ECB to x'40' ?

Tom Brennan wrote

Quote:
>Well, it really wasn't working.  You all were right... :)
<snip>
>What this means to me, is that my guesses at how WAIT/POST processing
>works were way off.  I was ass-uming that a WAIT told the dispatcher to
>check the *actual* ECB bits every time it gets around to seeing if the
>waiting TCB has any work to do.  Apparently that's not the case.  From
>this exercise it looks like POST must set or clear some other bit (I
>assume one of those TCB wait bits) which actually triggers the
>dispatcher to reload my regs and PSW and get wake up the task.

Yup. POST causes the waiting RB (it may not even be the current RB) to be
marked "ready" and if that RB also happens to be the current RB, then the
TCB will also be marked ready. It could be dispatched immediately, or some
time later, depending on its dispatch priority relative to other work that
is ready to run.

Chris.



Mon, 16 Jul 2001 03:00:00 GMT  
 Is it ok to POST by just setting an ECB to x'40' ?

Quote:

> Thanks everyone for the advice, and also to William Becker who said
> about the same thing via e-mail.  Sounds like my trial method shouldn't
> work at all - but there it is chugging away on our test system with no
> apparent problems.  Based on the fact that CS was mentioned, it could be
> this is working simply because our test system runs on a single
> processor with little workload.

> Time to get the book out!

> Tom

On a UP (one processor) you should be able to "get away with"
posting an ECB by turning on the POST bit, but I would never do
that. You can "get away" with it because , after all, if you are
running then by definition the other task is not. When the other
task eventually does a WAIT it will detect that the ECB is already
POSTed and won't really wait for anything. Turning on the POST bit
while the ECB is already WAITed on will not "wake up" the waiting
task. That is what the POST SVC is supposed to be doing. It has to
arrange for the waiting task to go through the dispatcher.

If you look at the example in the POP (POO to some of you) what
you will find is a "High Speed POST" routine. What this does is to
turn on the POST bit (via CS) if and only if the ECB is not
currently being WAITed on. IF it is waited on then it will do the
slow speed POST SVC.

I once was in an argument with another programmer that INSISTED
that it was illegal to post a clear ECB. No amount of explaining
would convince him otherwise. I finally coded an example and he
said "Oh".

--
---

Beyond Software, Inc.      http://www.beyond-software.com
"The Legacy Application Transformation Company"



Sat, 28 Jul 2001 03:00:00 GMT  
 
 [ 9 post ] 

 Relevant Pages 

1. new v.01.03 get's both sin and cos in 40

2. BUILD() doesn post error code 40 for dBase3 files

3. WAIT FOR AN ECB POST IN C PROGRAM (IBM C/C++)

4. 'who am i' from unix

5. strange: 'array set p' vs 'set p()'

6. (VA) what file 'abtva?40' do?

7. (VA) file what file 'abtva?40' do?

8. I'm not seeing Matz's posts on the mailing list

9. HTTPLib and POST problem with '?'

10. httplib and '100 Continue' after POST

11. 'post' form without form

12. '10 posts per page'

 

 
Powered by phpBB® Forum Software