Modulo 7 validation in ASM 
Author Message
 Modulo 7 validation in ASM

Quote:

>Hello,
>do anyone has an already written routine of validation MODULO 7 ?

I think we haven't yet finished the two instructions of the week.
(Maybe they should get two weeks), EX and LA.

But I would suggest D and DR, and also SRDA, very useful with D and DR,
after EX and LA are finished.

-- glen



Tue, 16 Jan 2001 03:00:00 GMT  
 Modulo 7 validation in ASM

Quote:

>> >Hello,

>> >do anyone has an already written routine of validation MODULO 7 ?

>Isn't it simply the following, assuming R6=0 and R7=a number?
>D  R6,=F'7'
>LTR R6,R6                Mod(7)?
>BNZ NOT_MOD7             NO, if there is a remainder
>..                       MOD(7)
>..                        CODE
>..                         FRAGMENT

If number is positive, or unsigned 32 bit, yes.  

Otherwise,

number in R6.

  SRDA  R6,32
  D     R6,=F'7'
  LTR R6,R6   I hope this is the remainder register, I didn't check.
  BNZ  NM7

-- glen

PS:

Do modern processors optimize for the SRDA  R,32 case as a sign extension?



Sat, 20 Jan 2001 03:00:00 GMT  
 Modulo 7 validation in ASM

Quote:


> >> >Hello,

> >> >do anyone has an already written routine of validation MODULO 7 ?

> >Isn't it simply the following, assuming R6=0 and R7=a number?

> >D  R6,=F'7'
> >LTR R6,R6                Mod(7)?
> >BNZ NOT_MOD7             NO, if there is a remainder
> >..                       MOD(7)
> >..                        CODE
> >..                         FRAGMENT

> If number is positive, or unsigned 32 bit, yes.

> Otherwise,

> number in R6.

>   SRDA  R6,32
>   D     R6,=F'7'
>   LTR R6,R6   I hope this is the remainder register, I didn't check.

It is.  I use the mnemonic QORE (Quotient Odd Remainder Even; I
pronounce it "core") to remember.

Quote:
>   BNZ  NM7

> -- glen

> PS:

> Do modern processors optimize for the SRDA  R,32 case as a sign extension?

Don't know...

      -jc-



Mon, 22 Jan 2001 03:00:00 GMT  
 Modulo 7 validation in ASM

Quote:
> > PS:

> > Do modern processors optimize for the SRDA  R,32 case as a sign extension?

Modern processors do all shift instructions in one

cycle.

   - Brent



Mon, 29 Jan 2001 03:00:00 GMT  
 
 [ 6 post ] 

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