CNOP (was Re: DIAG unknown OP) 
Author Message
 CNOP (was Re: DIAG unknown OP)

Quote:

>If you're aligning executable code, the assembler will fill the gap
>between the previous location counter and the newly aligned one with
>binary zeros, an invalid op-code that will cause an exception if
>executed.  CNOP 0,8 is an assembler instruction causing enough x'0700'
>(which says, in effect, under no circumstances should you branch to
>location zero, i.e., a no-op) instructions to be inserted to align it on a
>doubleword boundry ("0,8" means "0 bytes into a boundry divisible by 8").
>If you're aligning only data, "DC 0D'0'" is just fine.

I want to fill in a few "blanks" in your answer.

All instructions 070x, where x=0 to F, are no-ops which mean don't branch
regardless of the condition code.  The instructions 07x0 are not quite
equivalent, even though all but one of them are also no-ops (because an address
stored in register 0 is never used for indexing or branching); on all
processors with multiple functional units (starting with the 360/91 and
including all modern ones), instruction 07F0 (BCR 15,0) is the serialization
instruction: all prefetched data is discarded, all results are stored, and the
processor basically starts at the next instruction from scratch (for things
like fetching instructions, prefetching data, etc.); in recent processors, this
is only used when one has done something unusual (like an unaligned store into
an instruction which is about to be executed) which the processor would
otherwise trip over, but on the 360/91 and 370/195, this instruction was used
all the time; these processors executed more than one instruction at once, and
would sometimes take "imprecise interrupts" when an earlier instruction failed
(e.g., for a floating point overflow) _after_ a later one had completed (which
could leave inconsistent results): the normal method to prepare for such
interrupts was to periodically issue serialization instructions and copy
results to memory where they could be restored for retry after an imprecise
interrupt.

IBM's new ES/9000 models are the first IBM processors since these earlier ones
to execute more than one instruction at once, but they don't require software
checkpoints (probably because they are taking internal checkpoints in
microcode: the 360/91 and 370/195 didn't have the technology available to make
that a desirable option).

--
John R. Grout
University of Illinois, Urbana-Champaign
Center for Supercomputing Research and Development




Wed, 06 Jul 1994 07:29:14 GMT  
 
 [ 1 post ] 

 Relevant Pages 

1. DIAG unknown OP

2. Serialization (was Re: DIAG unknown OP)

3. DIAG unknown OP

4. DIAG unknown OP

5. I am glad Oberon is unknown....

6. Interpretation of binary-op followed by unary-op

7. Reading unknown number of lines in unknown number of files

8. 2 questions: diag 68 and calling convention

9. instruction alignment and DIAG

10. Diag help files

11. Diag keyword

12. State diag. and Flow chart design

 

 
Powered by phpBB® Forum Software